|
enum | PCD_Register {
CommandReg = 0x01 << 1
, ComIEnReg = 0x02 << 1
, DivIEnReg = 0x03 << 1
, ComIrqReg = 0x04 << 1
,
DivIrqReg = 0x05 << 1
, ErrorReg = 0x06 << 1
, Status1Reg = 0x07 << 1
, Status2Reg = 0x08 << 1
,
FIFODataReg = 0x09 << 1
, FIFOLevelReg = 0x0A << 1
, WaterLevelReg = 0x0B << 1
, ControlReg = 0x0C << 1
,
BitFramingReg = 0x0D << 1
, CollReg = 0x0E << 1
, ModeReg = 0x11 << 1
, TxModeReg = 0x12 << 1
,
RxModeReg = 0x13 << 1
, TxControlReg = 0x14 << 1
, TxASKReg = 0x15 << 1
, TxSelReg = 0x16 << 1
,
RxSelReg = 0x17 << 1
, RxThresholdReg = 0x18 << 1
, DemodReg = 0x19 << 1
, MfTxReg = 0x1C << 1
,
MfRxReg = 0x1D << 1
, SerialSpeedReg = 0x1F << 1
, CRCResultRegH = 0x21 << 1
, CRCResultRegL = 0x22 << 1
,
ModWidthReg = 0x24 << 1
, RFCfgReg = 0x26 << 1
, GsNReg = 0x27 << 1
, CWGsPReg = 0x28 << 1
,
ModGsPReg = 0x29 << 1
, TModeReg = 0x2A << 1
, TPrescalerReg = 0x2B << 1
, TReloadRegH = 0x2C << 1
,
TReloadRegL = 0x2D << 1
, TCounterValueRegH = 0x2E << 1
, TCounterValueRegL = 0x2F << 1
, TestSel1Reg = 0x31 << 1
,
TestSel2Reg = 0x32 << 1
, TestPinEnReg = 0x33 << 1
, TestPinValueReg = 0x34 << 1
, TestBusReg = 0x35 << 1
,
AutoTestReg = 0x36 << 1
, VersionReg = 0x37 << 1
, AnalogTestReg = 0x38 << 1
, TestDAC1Reg = 0x39 << 1
,
TestDAC2Reg = 0x3A << 1
, TestADCReg = 0x3B << 1
, CommandReg = 0x01 << 1
, ComIEnReg = 0x02 << 1
,
DivIEnReg = 0x03 << 1
, ComIrqReg = 0x04 << 1
, DivIrqReg = 0x05 << 1
, ErrorReg = 0x06 << 1
,
Status1Reg = 0x07 << 1
, Status2Reg = 0x08 << 1
, FIFODataReg = 0x09 << 1
, FIFOLevelReg = 0x0A << 1
,
WaterLevelReg = 0x0B << 1
, ControlReg = 0x0C << 1
, BitFramingReg = 0x0D << 1
, CollReg = 0x0E << 1
,
ModeReg = 0x11 << 1
, TxModeReg = 0x12 << 1
, RxModeReg = 0x13 << 1
, TxControlReg = 0x14 << 1
,
TxASKReg = 0x15 << 1
, TxSelReg = 0x16 << 1
, RxSelReg = 0x17 << 1
, RxThresholdReg = 0x18 << 1
,
DemodReg = 0x19 << 1
, MfTxReg = 0x1C << 1
, MfRxReg = 0x1D << 1
, SerialSpeedReg = 0x1F << 1
,
CRCResultRegH = 0x21 << 1
, CRCResultRegL = 0x22 << 1
, ModWidthReg = 0x24 << 1
, RFCfgReg = 0x26 << 1
,
GsNReg = 0x27 << 1
, CWGsPReg = 0x28 << 1
, ModGsPReg = 0x29 << 1
, TModeReg = 0x2A << 1
,
TPrescalerReg = 0x2B << 1
, TReloadRegH = 0x2C << 1
, TReloadRegL = 0x2D << 1
, TCounterValueRegH = 0x2E << 1
,
TCounterValueRegL = 0x2F << 1
, TestSel1Reg = 0x31 << 1
, TestSel2Reg = 0x32 << 1
, TestPinEnReg = 0x33 << 1
,
TestPinValueReg = 0x34 << 1
, TestBusReg = 0x35 << 1
, AutoTestReg = 0x36 << 1
, VersionReg = 0x37 << 1
,
AnalogTestReg = 0x38 << 1
, TestDAC1Reg = 0x39 << 1
, TestDAC2Reg = 0x3A << 1
, TestADCReg = 0x3B << 1
} |
|
enum | PCD_Command {
PCD_Idle = 0x00
, PCD_Mem = 0x01
, PCD_GenerateRandomID = 0x02
, PCD_CalcCRC = 0x03
,
PCD_Transmit = 0x04
, PCD_NoCmdChange = 0x07
, PCD_Receive = 0x08
, PCD_Transceive = 0x0C
,
PCD_MFAuthent = 0x0E
, PCD_SoftReset = 0x0F
, PCD_Idle = 0x00
, PCD_Mem = 0x01
,
PCD_GenerateRandomID = 0x02
, PCD_CalcCRC = 0x03
, PCD_Transmit = 0x04
, PCD_NoCmdChange = 0x07
,
PCD_Receive = 0x08
, PCD_Transceive = 0x0C
, PCD_MFAuthent = 0x0E
, PCD_SoftReset = 0x0F
} |
|
enum | PCD_RxGain {
RxGain_18dB = 0x00 << 4
, RxGain_23dB = 0x01 << 4
, RxGain_18dB_2 = 0x02 << 4
, RxGain_23dB_2 = 0x03 << 4
,
RxGain_33dB = 0x04 << 4
, RxGain_38dB = 0x05 << 4
, RxGain_43dB = 0x06 << 4
, RxGain_48dB = 0x07 << 4
,
RxGain_min = 0x00 << 4
, RxGain_avg = 0x04 << 4
, RxGain_max = 0x07 << 4
, RxGain_18dB = 0x00 << 4
,
RxGain_23dB = 0x01 << 4
, RxGain_18dB_2 = 0x02 << 4
, RxGain_23dB_2 = 0x03 << 4
, RxGain_33dB = 0x04 << 4
,
RxGain_38dB = 0x05 << 4
, RxGain_43dB = 0x06 << 4
, RxGain_48dB = 0x07 << 4
, RxGain_min = 0x00 << 4
,
RxGain_avg = 0x04 << 4
, RxGain_max = 0x07 << 4
} |
|
enum | PICC_Command {
PICC_CMD_REQA = 0x26
, PICC_CMD_WUPA = 0x52
, PICC_CMD_CT = 0x88
, PICC_CMD_SEL_CL1 = 0x93
,
PICC_CMD_SEL_CL2 = 0x95
, PICC_CMD_SEL_CL3 = 0x97
, PICC_CMD_HLTA = 0x50
, PICC_CMD_MF_AUTH_KEY_A = 0x60
,
PICC_CMD_MF_AUTH_KEY_B = 0x61
, PICC_CMD_MF_READ = 0x30
, PICC_CMD_MF_WRITE = 0xA0
, PICC_CMD_MF_DECREMENT = 0xC0
,
PICC_CMD_MF_INCREMENT = 0xC1
, PICC_CMD_MF_RESTORE = 0xC2
, PICC_CMD_MF_TRANSFER = 0xB0
, PICC_CMD_UL_WRITE = 0xA2
,
PICC_CMD_REQA = 0x26
, PICC_CMD_WUPA = 0x52
, PICC_CMD_CT = 0x88
, PICC_CMD_SEL_CL1 = 0x93
,
PICC_CMD_SEL_CL2 = 0x95
, PICC_CMD_SEL_CL3 = 0x97
, PICC_CMD_HLTA = 0x50
, PICC_CMD_MF_AUTH_KEY_A = 0x60
,
PICC_CMD_MF_AUTH_KEY_B = 0x61
, PICC_CMD_MF_READ = 0x30
, PICC_CMD_MF_WRITE = 0xA0
, PICC_CMD_MF_DECREMENT = 0xC0
,
PICC_CMD_MF_INCREMENT = 0xC1
, PICC_CMD_MF_RESTORE = 0xC2
, PICC_CMD_MF_TRANSFER = 0xB0
, PICC_CMD_UL_WRITE = 0xA2
} |
|
enum | MIFARE_Misc { MF_ACK = 0xA
, MF_KEY_SIZE = 6
, MF_ACK = 0xA
, MF_KEY_SIZE = 6
} |
|
enum | PICC_Type {
PICC_TYPE_UNKNOWN = 0
, PICC_TYPE_ISO_14443_4 = 1
, PICC_TYPE_ISO_18092 = 2
, PICC_TYPE_MIFARE_MINI = 3
,
PICC_TYPE_MIFARE_1K = 4
, PICC_TYPE_MIFARE_4K = 5
, PICC_TYPE_MIFARE_UL = 6
, PICC_TYPE_MIFARE_PLUS = 7
,
PICC_TYPE_TNP3XXX = 8
, PICC_TYPE_NOT_COMPLETE = 255
, PICC_TYPE_UNKNOWN = 0
, PICC_TYPE_ISO_14443_4 = 1
,
PICC_TYPE_ISO_18092 = 2
, PICC_TYPE_MIFARE_MINI = 3
, PICC_TYPE_MIFARE_1K = 4
, PICC_TYPE_MIFARE_4K = 5
,
PICC_TYPE_MIFARE_UL = 6
, PICC_TYPE_MIFARE_PLUS = 7
, PICC_TYPE_TNP3XXX = 8
, PICC_TYPE_NOT_COMPLETE = 255
} |
|
enum | StatusCode {
STATUS_OK = 1
, STATUS_ERROR = 2
, STATUS_COLLISION = 3
, STATUS_TIMEOUT = 4
,
STATUS_NO_ROOM = 5
, STATUS_INTERNAL_ERROR = 6
, STATUS_INVALID = 7
, STATUS_CRC_WRONG = 8
,
STATUS_MIFARE_NACK = 9
, STATUS_OK = 1
, STATUS_ERROR = 2
, STATUS_COLLISION = 3
,
STATUS_TIMEOUT = 4
, STATUS_NO_ROOM = 5
, STATUS_INTERNAL_ERROR = 6
, STATUS_INVALID = 7
,
STATUS_CRC_WRONG = 8
, STATUS_MIFARE_NACK = 9
} |
|
enum | PCD_Register {
CommandReg = 0x01 << 1
, ComIEnReg = 0x02 << 1
, DivIEnReg = 0x03 << 1
, ComIrqReg = 0x04 << 1
,
DivIrqReg = 0x05 << 1
, ErrorReg = 0x06 << 1
, Status1Reg = 0x07 << 1
, Status2Reg = 0x08 << 1
,
FIFODataReg = 0x09 << 1
, FIFOLevelReg = 0x0A << 1
, WaterLevelReg = 0x0B << 1
, ControlReg = 0x0C << 1
,
BitFramingReg = 0x0D << 1
, CollReg = 0x0E << 1
, ModeReg = 0x11 << 1
, TxModeReg = 0x12 << 1
,
RxModeReg = 0x13 << 1
, TxControlReg = 0x14 << 1
, TxASKReg = 0x15 << 1
, TxSelReg = 0x16 << 1
,
RxSelReg = 0x17 << 1
, RxThresholdReg = 0x18 << 1
, DemodReg = 0x19 << 1
, MfTxReg = 0x1C << 1
,
MfRxReg = 0x1D << 1
, SerialSpeedReg = 0x1F << 1
, CRCResultRegH = 0x21 << 1
, CRCResultRegL = 0x22 << 1
,
ModWidthReg = 0x24 << 1
, RFCfgReg = 0x26 << 1
, GsNReg = 0x27 << 1
, CWGsPReg = 0x28 << 1
,
ModGsPReg = 0x29 << 1
, TModeReg = 0x2A << 1
, TPrescalerReg = 0x2B << 1
, TReloadRegH = 0x2C << 1
,
TReloadRegL = 0x2D << 1
, TCounterValueRegH = 0x2E << 1
, TCounterValueRegL = 0x2F << 1
, TestSel1Reg = 0x31 << 1
,
TestSel2Reg = 0x32 << 1
, TestPinEnReg = 0x33 << 1
, TestPinValueReg = 0x34 << 1
, TestBusReg = 0x35 << 1
,
AutoTestReg = 0x36 << 1
, VersionReg = 0x37 << 1
, AnalogTestReg = 0x38 << 1
, TestDAC1Reg = 0x39 << 1
,
TestDAC2Reg = 0x3A << 1
, TestADCReg = 0x3B << 1
, CommandReg = 0x01 << 1
, ComIEnReg = 0x02 << 1
,
DivIEnReg = 0x03 << 1
, ComIrqReg = 0x04 << 1
, DivIrqReg = 0x05 << 1
, ErrorReg = 0x06 << 1
,
Status1Reg = 0x07 << 1
, Status2Reg = 0x08 << 1
, FIFODataReg = 0x09 << 1
, FIFOLevelReg = 0x0A << 1
,
WaterLevelReg = 0x0B << 1
, ControlReg = 0x0C << 1
, BitFramingReg = 0x0D << 1
, CollReg = 0x0E << 1
,
ModeReg = 0x11 << 1
, TxModeReg = 0x12 << 1
, RxModeReg = 0x13 << 1
, TxControlReg = 0x14 << 1
,
TxASKReg = 0x15 << 1
, TxSelReg = 0x16 << 1
, RxSelReg = 0x17 << 1
, RxThresholdReg = 0x18 << 1
,
DemodReg = 0x19 << 1
, MfTxReg = 0x1C << 1
, MfRxReg = 0x1D << 1
, SerialSpeedReg = 0x1F << 1
,
CRCResultRegH = 0x21 << 1
, CRCResultRegL = 0x22 << 1
, ModWidthReg = 0x24 << 1
, RFCfgReg = 0x26 << 1
,
GsNReg = 0x27 << 1
, CWGsPReg = 0x28 << 1
, ModGsPReg = 0x29 << 1
, TModeReg = 0x2A << 1
,
TPrescalerReg = 0x2B << 1
, TReloadRegH = 0x2C << 1
, TReloadRegL = 0x2D << 1
, TCounterValueRegH = 0x2E << 1
,
TCounterValueRegL = 0x2F << 1
, TestSel1Reg = 0x31 << 1
, TestSel2Reg = 0x32 << 1
, TestPinEnReg = 0x33 << 1
,
TestPinValueReg = 0x34 << 1
, TestBusReg = 0x35 << 1
, AutoTestReg = 0x36 << 1
, VersionReg = 0x37 << 1
,
AnalogTestReg = 0x38 << 1
, TestDAC1Reg = 0x39 << 1
, TestDAC2Reg = 0x3A << 1
, TestADCReg = 0x3B << 1
} |
|
enum | PCD_Command {
PCD_Idle = 0x00
, PCD_Mem = 0x01
, PCD_GenerateRandomID = 0x02
, PCD_CalcCRC = 0x03
,
PCD_Transmit = 0x04
, PCD_NoCmdChange = 0x07
, PCD_Receive = 0x08
, PCD_Transceive = 0x0C
,
PCD_MFAuthent = 0x0E
, PCD_SoftReset = 0x0F
, PCD_Idle = 0x00
, PCD_Mem = 0x01
,
PCD_GenerateRandomID = 0x02
, PCD_CalcCRC = 0x03
, PCD_Transmit = 0x04
, PCD_NoCmdChange = 0x07
,
PCD_Receive = 0x08
, PCD_Transceive = 0x0C
, PCD_MFAuthent = 0x0E
, PCD_SoftReset = 0x0F
} |
|
enum | PCD_RxGain {
RxGain_18dB = 0x00 << 4
, RxGain_23dB = 0x01 << 4
, RxGain_18dB_2 = 0x02 << 4
, RxGain_23dB_2 = 0x03 << 4
,
RxGain_33dB = 0x04 << 4
, RxGain_38dB = 0x05 << 4
, RxGain_43dB = 0x06 << 4
, RxGain_48dB = 0x07 << 4
,
RxGain_min = 0x00 << 4
, RxGain_avg = 0x04 << 4
, RxGain_max = 0x07 << 4
, RxGain_18dB = 0x00 << 4
,
RxGain_23dB = 0x01 << 4
, RxGain_18dB_2 = 0x02 << 4
, RxGain_23dB_2 = 0x03 << 4
, RxGain_33dB = 0x04 << 4
,
RxGain_38dB = 0x05 << 4
, RxGain_43dB = 0x06 << 4
, RxGain_48dB = 0x07 << 4
, RxGain_min = 0x00 << 4
,
RxGain_avg = 0x04 << 4
, RxGain_max = 0x07 << 4
} |
|
enum | PICC_Command {
PICC_CMD_REQA = 0x26
, PICC_CMD_WUPA = 0x52
, PICC_CMD_CT = 0x88
, PICC_CMD_SEL_CL1 = 0x93
,
PICC_CMD_SEL_CL2 = 0x95
, PICC_CMD_SEL_CL3 = 0x97
, PICC_CMD_HLTA = 0x50
, PICC_CMD_MF_AUTH_KEY_A = 0x60
,
PICC_CMD_MF_AUTH_KEY_B = 0x61
, PICC_CMD_MF_READ = 0x30
, PICC_CMD_MF_WRITE = 0xA0
, PICC_CMD_MF_DECREMENT = 0xC0
,
PICC_CMD_MF_INCREMENT = 0xC1
, PICC_CMD_MF_RESTORE = 0xC2
, PICC_CMD_MF_TRANSFER = 0xB0
, PICC_CMD_UL_WRITE = 0xA2
,
PICC_CMD_REQA = 0x26
, PICC_CMD_WUPA = 0x52
, PICC_CMD_CT = 0x88
, PICC_CMD_SEL_CL1 = 0x93
,
PICC_CMD_SEL_CL2 = 0x95
, PICC_CMD_SEL_CL3 = 0x97
, PICC_CMD_HLTA = 0x50
, PICC_CMD_MF_AUTH_KEY_A = 0x60
,
PICC_CMD_MF_AUTH_KEY_B = 0x61
, PICC_CMD_MF_READ = 0x30
, PICC_CMD_MF_WRITE = 0xA0
, PICC_CMD_MF_DECREMENT = 0xC0
,
PICC_CMD_MF_INCREMENT = 0xC1
, PICC_CMD_MF_RESTORE = 0xC2
, PICC_CMD_MF_TRANSFER = 0xB0
, PICC_CMD_UL_WRITE = 0xA2
} |
|
enum | MIFARE_Misc { MF_ACK = 0xA
, MF_KEY_SIZE = 6
, MF_ACK = 0xA
, MF_KEY_SIZE = 6
} |
|
enum | PICC_Type {
PICC_TYPE_UNKNOWN = 0
, PICC_TYPE_ISO_14443_4 = 1
, PICC_TYPE_ISO_18092 = 2
, PICC_TYPE_MIFARE_MINI = 3
,
PICC_TYPE_MIFARE_1K = 4
, PICC_TYPE_MIFARE_4K = 5
, PICC_TYPE_MIFARE_UL = 6
, PICC_TYPE_MIFARE_PLUS = 7
,
PICC_TYPE_TNP3XXX = 8
, PICC_TYPE_NOT_COMPLETE = 255
, PICC_TYPE_UNKNOWN = 0
, PICC_TYPE_ISO_14443_4 = 1
,
PICC_TYPE_ISO_18092 = 2
, PICC_TYPE_MIFARE_MINI = 3
, PICC_TYPE_MIFARE_1K = 4
, PICC_TYPE_MIFARE_4K = 5
,
PICC_TYPE_MIFARE_UL = 6
, PICC_TYPE_MIFARE_PLUS = 7
, PICC_TYPE_TNP3XXX = 8
, PICC_TYPE_NOT_COMPLETE = 255
} |
|
enum | StatusCode {
STATUS_OK = 1
, STATUS_ERROR = 2
, STATUS_COLLISION = 3
, STATUS_TIMEOUT = 4
,
STATUS_NO_ROOM = 5
, STATUS_INTERNAL_ERROR = 6
, STATUS_INVALID = 7
, STATUS_CRC_WRONG = 8
,
STATUS_MIFARE_NACK = 9
, STATUS_OK = 1
, STATUS_ERROR = 2
, STATUS_COLLISION = 3
,
STATUS_TIMEOUT = 4
, STATUS_NO_ROOM = 5
, STATUS_INTERNAL_ERROR = 6
, STATUS_INVALID = 7
,
STATUS_CRC_WRONG = 8
, STATUS_MIFARE_NACK = 9
} |
|
|
| MFRC522 (ISpi &, IGpio &resetPin) |
|
void | PCD_WriteRegister (uint8_t reg, uint8_t value) |
|
void | PCD_WriteRegister (uint8_t reg, uint8_t count, uint8_t *values) |
|
uint8_t | PCD_ReadRegister (uint8_t reg) |
|
void | PCD_ReadRegister (uint8_t reg, uint8_t count, uint8_t *values, uint8_t rxAlign=0) |
|
void | setBitMask (unsigned char reg, unsigned char mask) |
|
void | PCD_SetRegisterBitMask (uint8_t reg, uint8_t mask) |
|
void | PCD_ClearRegisterBitMask (uint8_t reg, uint8_t mask) |
|
uint8_t | PCD_CalculateCRC (uint8_t *data, uint8_t length, uint8_t *result) |
|
void | PCD_Init () |
|
void | PCD_Reset () |
|
void | PCD_AntennaOn () |
|
void | PCD_AntennaOff () |
|
uint8_t | PCD_GetAntennaGain () |
|
void | PCD_SetAntennaGain (uint8_t mask) |
|
bool | PCD_PerformSelfTest () |
|
uint8_t | PCD_TransceiveData (uint8_t *sendData, uint8_t sendLen, uint8_t *backData, uint8_t *backLen, uint8_t *validBits=NULL, uint8_t rxAlign=0, bool checkCRC=false) |
|
uint8_t | PCD_CommunicateWithPICC (uint8_t command, uint8_t waitIRq, uint8_t *sendData, uint8_t sendLen, uint8_t *backData=NULL, uint8_t *backLen=NULL, uint8_t *validBits=NULL, uint8_t rxAlign=0, bool checkCRC=false) |
|
uint8_t | PICC_RequestA (uint8_t *bufferATQA, uint8_t *bufferSize) |
|
uint8_t | PICC_WakeupA (uint8_t *bufferATQA, uint8_t *bufferSize) |
|
uint8_t | PICC_REQA_or_WUPA (uint8_t command, uint8_t *bufferATQA, uint8_t *bufferSize) |
|
uint8_t | PICC_Select (Uid *uid, uint8_t validBits=0) |
|
uint8_t | PICC_HaltA () |
|
uint8_t | PCD_Authenticate (uint8_t command, uint8_t blockAddr, MIFARE_Key *key, Uid *uid) |
|
void | PCD_StopCrypto1 () |
|
uint8_t | MIFARE_Read (uint8_t blockAddr, uint8_t *buffer, uint8_t *bufferSize) |
|
uint8_t | MIFARE_Write (uint8_t blockAddr, uint8_t *buffer, uint8_t bufferSize) |
|
uint8_t | MIFARE_Decrement (uint8_t blockAddr, long delta) |
|
uint8_t | MIFARE_Increment (uint8_t blockAddr, long delta) |
|
uint8_t | MIFARE_Restore (uint8_t blockAddr) |
|
uint8_t | MIFARE_Transfer (uint8_t blockAddr) |
|
uint8_t | MIFARE_Ultralight_Write (uint8_t page, uint8_t *buffer, uint8_t bufferSize) |
|
uint8_t | MIFARE_GetValue (uint8_t blockAddr, long *value) |
|
uint8_t | MIFARE_SetValue (uint8_t blockAddr, long value) |
|
uint8_t | PCD_MIFARE_Transceive (uint8_t *sendData, uint8_t sendLen, bool acceptTimeout=false) |
|
const string | GetStatusCodeName (uint8_t code) |
|
uint8_t | PICC_GetType (uint8_t sak) |
|
const string | PICC_GetTypeName (uint8_t type) |
|
void | PICC_DumpToSerial (Uid *uid) |
|
void | PICC_DumpMifareClassicToSerial (Uid *uid, uint8_t piccType, MIFARE_Key *key) |
|
void | PICC_DumpMifareClassicSectorToSerial (Uid *uid, MIFARE_Key *key, uint8_t sector) |
|
void | PICC_DumpMifareUltralightToSerial () |
|
void | MIFARE_SetAccessBits (uint8_t *accessBitBuffer, uint8_t g0, uint8_t g1, uint8_t g2, uint8_t g3) |
|
bool | MIFARE_OpenUidBackdoor (bool logErrors) |
|
bool | MIFARE_SetUid (uint8_t *newUid, uint8_t uidSize, bool logErrors) |
|
bool | MIFARE_UnbrickUidSector (bool logErrors) |
|
bool | PICC_IsNewCardPresent () |
|
bool | PICC_ReadCardSerial () |
|
| MFRC522 (ISpi &, IGpio &resetPin) |
|
void | PCD_WriteRegister (uint8_t reg, uint8_t value) |
|
void | PCD_WriteRegister (uint8_t reg, uint8_t count, uint8_t *values) |
|
uint8_t | PCD_ReadRegister (uint8_t reg) |
|
void | PCD_ReadRegister (uint8_t reg, uint8_t count, uint8_t *values, uint8_t rxAlign=0) |
|
void | setBitMask (unsigned char reg, unsigned char mask) |
|
void | PCD_SetRegisterBitMask (uint8_t reg, uint8_t mask) |
|
void | PCD_ClearRegisterBitMask (uint8_t reg, uint8_t mask) |
|
uint8_t | PCD_CalculateCRC (uint8_t *data, uint8_t length, uint8_t *result) |
|
void | PCD_Init () |
|
void | PCD_Reset () |
|
void | PCD_AntennaOn () |
|
void | PCD_AntennaOff () |
|
uint8_t | PCD_GetAntennaGain () |
|
void | PCD_SetAntennaGain (uint8_t mask) |
|
bool | PCD_PerformSelfTest () |
|
uint8_t | PCD_TransceiveData (uint8_t *sendData, uint8_t sendLen, uint8_t *backData, uint8_t *backLen, uint8_t *validBits=NULL, uint8_t rxAlign=0, bool checkCRC=false) |
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uint8_t | PCD_CommunicateWithPICC (uint8_t command, uint8_t waitIRq, uint8_t *sendData, uint8_t sendLen, uint8_t *backData=NULL, uint8_t *backLen=NULL, uint8_t *validBits=NULL, uint8_t rxAlign=0, bool checkCRC=false) |
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uint8_t | PICC_RequestA (uint8_t *bufferATQA, uint8_t *bufferSize) |
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uint8_t | PICC_WakeupA (uint8_t *bufferATQA, uint8_t *bufferSize) |
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uint8_t | PICC_REQA_or_WUPA (uint8_t command, uint8_t *bufferATQA, uint8_t *bufferSize) |
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uint8_t | PICC_Select (Uid *uid, uint8_t validBits=0) |
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uint8_t | PICC_HaltA () |
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uint8_t | PCD_Authenticate (uint8_t command, uint8_t blockAddr, MIFARE_Key *key, Uid *uid) |
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void | PCD_StopCrypto1 () |
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uint8_t | MIFARE_Read (uint8_t blockAddr, uint8_t *buffer, uint8_t *bufferSize) |
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uint8_t | MIFARE_Write (uint8_t blockAddr, uint8_t *buffer, uint8_t bufferSize) |
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uint8_t | MIFARE_Decrement (uint8_t blockAddr, long delta) |
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uint8_t | MIFARE_Increment (uint8_t blockAddr, long delta) |
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uint8_t | MIFARE_Restore (uint8_t blockAddr) |
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uint8_t | MIFARE_Transfer (uint8_t blockAddr) |
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uint8_t | MIFARE_Ultralight_Write (uint8_t page, uint8_t *buffer, uint8_t bufferSize) |
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uint8_t | MIFARE_GetValue (uint8_t blockAddr, long *value) |
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uint8_t | MIFARE_SetValue (uint8_t blockAddr, long value) |
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uint8_t | PCD_MIFARE_Transceive (uint8_t *sendData, uint8_t sendLen, bool acceptTimeout=false) |
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const string | GetStatusCodeName (uint8_t code) |
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uint8_t | PICC_GetType (uint8_t sak) |
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const string | PICC_GetTypeName (uint8_t type) |
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void | PICC_DumpToSerial (Uid *uid) |
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void | PICC_DumpMifareClassicToSerial (Uid *uid, uint8_t piccType, MIFARE_Key *key) |
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void | PICC_DumpMifareClassicSectorToSerial (Uid *uid, MIFARE_Key *key, uint8_t sector) |
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void | PICC_DumpMifareUltralightToSerial () |
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void | MIFARE_SetAccessBits (uint8_t *accessBitBuffer, uint8_t g0, uint8_t g1, uint8_t g2, uint8_t g3) |
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bool | MIFARE_OpenUidBackdoor (bool logErrors) |
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bool | MIFARE_SetUid (uint8_t *newUid, uint8_t uidSize, bool logErrors) |
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bool | MIFARE_UnbrickUidSector (bool logErrors) |
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bool | PICC_IsNewCardPresent () |
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bool | PICC_ReadCardSerial () |
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