HomeGPT v.1.0
HomeGPT revolutionizes home automation with advanced features such as facial recognition for secure access, mood-responsive lighting, RFID-enabled garage entry, and clap-activated door closures. This system elevates the living experience by seamlessly blending security, convenience, and ambiance-enhancing technology.
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Classes | Public Types | Public Member Functions | Public Attributes | Static Public Attributes | List of all members
mfrc522::MFRC522 Class Reference

#include <mfrc522.h>

Collaboration diagram for mfrc522::MFRC522:
Collaboration graph
[legend]

Classes

struct  MIFARE_Key
 
struct  Uid
 

Public Types

enum  PCD_Register {
  CommandReg = 0x01 << 1 , ComIEnReg = 0x02 << 1 , DivIEnReg = 0x03 << 1 , ComIrqReg = 0x04 << 1 ,
  DivIrqReg = 0x05 << 1 , ErrorReg = 0x06 << 1 , Status1Reg = 0x07 << 1 , Status2Reg = 0x08 << 1 ,
  FIFODataReg = 0x09 << 1 , FIFOLevelReg = 0x0A << 1 , WaterLevelReg = 0x0B << 1 , ControlReg = 0x0C << 1 ,
  BitFramingReg = 0x0D << 1 , CollReg = 0x0E << 1 , ModeReg = 0x11 << 1 , TxModeReg = 0x12 << 1 ,
  RxModeReg = 0x13 << 1 , TxControlReg = 0x14 << 1 , TxASKReg = 0x15 << 1 , TxSelReg = 0x16 << 1 ,
  RxSelReg = 0x17 << 1 , RxThresholdReg = 0x18 << 1 , DemodReg = 0x19 << 1 , MfTxReg = 0x1C << 1 ,
  MfRxReg = 0x1D << 1 , SerialSpeedReg = 0x1F << 1 , CRCResultRegH = 0x21 << 1 , CRCResultRegL = 0x22 << 1 ,
  ModWidthReg = 0x24 << 1 , RFCfgReg = 0x26 << 1 , GsNReg = 0x27 << 1 , CWGsPReg = 0x28 << 1 ,
  ModGsPReg = 0x29 << 1 , TModeReg = 0x2A << 1 , TPrescalerReg = 0x2B << 1 , TReloadRegH = 0x2C << 1 ,
  TReloadRegL = 0x2D << 1 , TCounterValueRegH = 0x2E << 1 , TCounterValueRegL = 0x2F << 1 , TestSel1Reg = 0x31 << 1 ,
  TestSel2Reg = 0x32 << 1 , TestPinEnReg = 0x33 << 1 , TestPinValueReg = 0x34 << 1 , TestBusReg = 0x35 << 1 ,
  AutoTestReg = 0x36 << 1 , VersionReg = 0x37 << 1 , AnalogTestReg = 0x38 << 1 , TestDAC1Reg = 0x39 << 1 ,
  TestDAC2Reg = 0x3A << 1 , TestADCReg = 0x3B << 1 , CommandReg = 0x01 << 1 , ComIEnReg = 0x02 << 1 ,
  DivIEnReg = 0x03 << 1 , ComIrqReg = 0x04 << 1 , DivIrqReg = 0x05 << 1 , ErrorReg = 0x06 << 1 ,
  Status1Reg = 0x07 << 1 , Status2Reg = 0x08 << 1 , FIFODataReg = 0x09 << 1 , FIFOLevelReg = 0x0A << 1 ,
  WaterLevelReg = 0x0B << 1 , ControlReg = 0x0C << 1 , BitFramingReg = 0x0D << 1 , CollReg = 0x0E << 1 ,
  ModeReg = 0x11 << 1 , TxModeReg = 0x12 << 1 , RxModeReg = 0x13 << 1 , TxControlReg = 0x14 << 1 ,
  TxASKReg = 0x15 << 1 , TxSelReg = 0x16 << 1 , RxSelReg = 0x17 << 1 , RxThresholdReg = 0x18 << 1 ,
  DemodReg = 0x19 << 1 , MfTxReg = 0x1C << 1 , MfRxReg = 0x1D << 1 , SerialSpeedReg = 0x1F << 1 ,
  CRCResultRegH = 0x21 << 1 , CRCResultRegL = 0x22 << 1 , ModWidthReg = 0x24 << 1 , RFCfgReg = 0x26 << 1 ,
  GsNReg = 0x27 << 1 , CWGsPReg = 0x28 << 1 , ModGsPReg = 0x29 << 1 , TModeReg = 0x2A << 1 ,
  TPrescalerReg = 0x2B << 1 , TReloadRegH = 0x2C << 1 , TReloadRegL = 0x2D << 1 , TCounterValueRegH = 0x2E << 1 ,
  TCounterValueRegL = 0x2F << 1 , TestSel1Reg = 0x31 << 1 , TestSel2Reg = 0x32 << 1 , TestPinEnReg = 0x33 << 1 ,
  TestPinValueReg = 0x34 << 1 , TestBusReg = 0x35 << 1 , AutoTestReg = 0x36 << 1 , VersionReg = 0x37 << 1 ,
  AnalogTestReg = 0x38 << 1 , TestDAC1Reg = 0x39 << 1 , TestDAC2Reg = 0x3A << 1 , TestADCReg = 0x3B << 1
}
 
enum  PCD_Command {
  PCD_Idle = 0x00 , PCD_Mem = 0x01 , PCD_GenerateRandomID = 0x02 , PCD_CalcCRC = 0x03 ,
  PCD_Transmit = 0x04 , PCD_NoCmdChange = 0x07 , PCD_Receive = 0x08 , PCD_Transceive = 0x0C ,
  PCD_MFAuthent = 0x0E , PCD_SoftReset = 0x0F , PCD_Idle = 0x00 , PCD_Mem = 0x01 ,
  PCD_GenerateRandomID = 0x02 , PCD_CalcCRC = 0x03 , PCD_Transmit = 0x04 , PCD_NoCmdChange = 0x07 ,
  PCD_Receive = 0x08 , PCD_Transceive = 0x0C , PCD_MFAuthent = 0x0E , PCD_SoftReset = 0x0F
}
 
enum  PCD_RxGain {
  RxGain_18dB = 0x00 << 4 , RxGain_23dB = 0x01 << 4 , RxGain_18dB_2 = 0x02 << 4 , RxGain_23dB_2 = 0x03 << 4 ,
  RxGain_33dB = 0x04 << 4 , RxGain_38dB = 0x05 << 4 , RxGain_43dB = 0x06 << 4 , RxGain_48dB = 0x07 << 4 ,
  RxGain_min = 0x00 << 4 , RxGain_avg = 0x04 << 4 , RxGain_max = 0x07 << 4 , RxGain_18dB = 0x00 << 4 ,
  RxGain_23dB = 0x01 << 4 , RxGain_18dB_2 = 0x02 << 4 , RxGain_23dB_2 = 0x03 << 4 , RxGain_33dB = 0x04 << 4 ,
  RxGain_38dB = 0x05 << 4 , RxGain_43dB = 0x06 << 4 , RxGain_48dB = 0x07 << 4 , RxGain_min = 0x00 << 4 ,
  RxGain_avg = 0x04 << 4 , RxGain_max = 0x07 << 4
}
 
enum  PICC_Command {
  PICC_CMD_REQA = 0x26 , PICC_CMD_WUPA = 0x52 , PICC_CMD_CT = 0x88 , PICC_CMD_SEL_CL1 = 0x93 ,
  PICC_CMD_SEL_CL2 = 0x95 , PICC_CMD_SEL_CL3 = 0x97 , PICC_CMD_HLTA = 0x50 , PICC_CMD_MF_AUTH_KEY_A = 0x60 ,
  PICC_CMD_MF_AUTH_KEY_B = 0x61 , PICC_CMD_MF_READ = 0x30 , PICC_CMD_MF_WRITE = 0xA0 , PICC_CMD_MF_DECREMENT = 0xC0 ,
  PICC_CMD_MF_INCREMENT = 0xC1 , PICC_CMD_MF_RESTORE = 0xC2 , PICC_CMD_MF_TRANSFER = 0xB0 , PICC_CMD_UL_WRITE = 0xA2 ,
  PICC_CMD_REQA = 0x26 , PICC_CMD_WUPA = 0x52 , PICC_CMD_CT = 0x88 , PICC_CMD_SEL_CL1 = 0x93 ,
  PICC_CMD_SEL_CL2 = 0x95 , PICC_CMD_SEL_CL3 = 0x97 , PICC_CMD_HLTA = 0x50 , PICC_CMD_MF_AUTH_KEY_A = 0x60 ,
  PICC_CMD_MF_AUTH_KEY_B = 0x61 , PICC_CMD_MF_READ = 0x30 , PICC_CMD_MF_WRITE = 0xA0 , PICC_CMD_MF_DECREMENT = 0xC0 ,
  PICC_CMD_MF_INCREMENT = 0xC1 , PICC_CMD_MF_RESTORE = 0xC2 , PICC_CMD_MF_TRANSFER = 0xB0 , PICC_CMD_UL_WRITE = 0xA2
}
 
enum  MIFARE_Misc { MF_ACK = 0xA , MF_KEY_SIZE = 6 , MF_ACK = 0xA , MF_KEY_SIZE = 6 }
 
enum  PICC_Type {
  PICC_TYPE_UNKNOWN = 0 , PICC_TYPE_ISO_14443_4 = 1 , PICC_TYPE_ISO_18092 = 2 , PICC_TYPE_MIFARE_MINI = 3 ,
  PICC_TYPE_MIFARE_1K = 4 , PICC_TYPE_MIFARE_4K = 5 , PICC_TYPE_MIFARE_UL = 6 , PICC_TYPE_MIFARE_PLUS = 7 ,
  PICC_TYPE_TNP3XXX = 8 , PICC_TYPE_NOT_COMPLETE = 255 , PICC_TYPE_UNKNOWN = 0 , PICC_TYPE_ISO_14443_4 = 1 ,
  PICC_TYPE_ISO_18092 = 2 , PICC_TYPE_MIFARE_MINI = 3 , PICC_TYPE_MIFARE_1K = 4 , PICC_TYPE_MIFARE_4K = 5 ,
  PICC_TYPE_MIFARE_UL = 6 , PICC_TYPE_MIFARE_PLUS = 7 , PICC_TYPE_TNP3XXX = 8 , PICC_TYPE_NOT_COMPLETE = 255
}
 
enum  StatusCode {
  STATUS_OK = 1 , STATUS_ERROR = 2 , STATUS_COLLISION = 3 , STATUS_TIMEOUT = 4 ,
  STATUS_NO_ROOM = 5 , STATUS_INTERNAL_ERROR = 6 , STATUS_INVALID = 7 , STATUS_CRC_WRONG = 8 ,
  STATUS_MIFARE_NACK = 9 , STATUS_OK = 1 , STATUS_ERROR = 2 , STATUS_COLLISION = 3 ,
  STATUS_TIMEOUT = 4 , STATUS_NO_ROOM = 5 , STATUS_INTERNAL_ERROR = 6 , STATUS_INVALID = 7 ,
  STATUS_CRC_WRONG = 8 , STATUS_MIFARE_NACK = 9
}
 
enum  PCD_Register {
  CommandReg = 0x01 << 1 , ComIEnReg = 0x02 << 1 , DivIEnReg = 0x03 << 1 , ComIrqReg = 0x04 << 1 ,
  DivIrqReg = 0x05 << 1 , ErrorReg = 0x06 << 1 , Status1Reg = 0x07 << 1 , Status2Reg = 0x08 << 1 ,
  FIFODataReg = 0x09 << 1 , FIFOLevelReg = 0x0A << 1 , WaterLevelReg = 0x0B << 1 , ControlReg = 0x0C << 1 ,
  BitFramingReg = 0x0D << 1 , CollReg = 0x0E << 1 , ModeReg = 0x11 << 1 , TxModeReg = 0x12 << 1 ,
  RxModeReg = 0x13 << 1 , TxControlReg = 0x14 << 1 , TxASKReg = 0x15 << 1 , TxSelReg = 0x16 << 1 ,
  RxSelReg = 0x17 << 1 , RxThresholdReg = 0x18 << 1 , DemodReg = 0x19 << 1 , MfTxReg = 0x1C << 1 ,
  MfRxReg = 0x1D << 1 , SerialSpeedReg = 0x1F << 1 , CRCResultRegH = 0x21 << 1 , CRCResultRegL = 0x22 << 1 ,
  ModWidthReg = 0x24 << 1 , RFCfgReg = 0x26 << 1 , GsNReg = 0x27 << 1 , CWGsPReg = 0x28 << 1 ,
  ModGsPReg = 0x29 << 1 , TModeReg = 0x2A << 1 , TPrescalerReg = 0x2B << 1 , TReloadRegH = 0x2C << 1 ,
  TReloadRegL = 0x2D << 1 , TCounterValueRegH = 0x2E << 1 , TCounterValueRegL = 0x2F << 1 , TestSel1Reg = 0x31 << 1 ,
  TestSel2Reg = 0x32 << 1 , TestPinEnReg = 0x33 << 1 , TestPinValueReg = 0x34 << 1 , TestBusReg = 0x35 << 1 ,
  AutoTestReg = 0x36 << 1 , VersionReg = 0x37 << 1 , AnalogTestReg = 0x38 << 1 , TestDAC1Reg = 0x39 << 1 ,
  TestDAC2Reg = 0x3A << 1 , TestADCReg = 0x3B << 1 , CommandReg = 0x01 << 1 , ComIEnReg = 0x02 << 1 ,
  DivIEnReg = 0x03 << 1 , ComIrqReg = 0x04 << 1 , DivIrqReg = 0x05 << 1 , ErrorReg = 0x06 << 1 ,
  Status1Reg = 0x07 << 1 , Status2Reg = 0x08 << 1 , FIFODataReg = 0x09 << 1 , FIFOLevelReg = 0x0A << 1 ,
  WaterLevelReg = 0x0B << 1 , ControlReg = 0x0C << 1 , BitFramingReg = 0x0D << 1 , CollReg = 0x0E << 1 ,
  ModeReg = 0x11 << 1 , TxModeReg = 0x12 << 1 , RxModeReg = 0x13 << 1 , TxControlReg = 0x14 << 1 ,
  TxASKReg = 0x15 << 1 , TxSelReg = 0x16 << 1 , RxSelReg = 0x17 << 1 , RxThresholdReg = 0x18 << 1 ,
  DemodReg = 0x19 << 1 , MfTxReg = 0x1C << 1 , MfRxReg = 0x1D << 1 , SerialSpeedReg = 0x1F << 1 ,
  CRCResultRegH = 0x21 << 1 , CRCResultRegL = 0x22 << 1 , ModWidthReg = 0x24 << 1 , RFCfgReg = 0x26 << 1 ,
  GsNReg = 0x27 << 1 , CWGsPReg = 0x28 << 1 , ModGsPReg = 0x29 << 1 , TModeReg = 0x2A << 1 ,
  TPrescalerReg = 0x2B << 1 , TReloadRegH = 0x2C << 1 , TReloadRegL = 0x2D << 1 , TCounterValueRegH = 0x2E << 1 ,
  TCounterValueRegL = 0x2F << 1 , TestSel1Reg = 0x31 << 1 , TestSel2Reg = 0x32 << 1 , TestPinEnReg = 0x33 << 1 ,
  TestPinValueReg = 0x34 << 1 , TestBusReg = 0x35 << 1 , AutoTestReg = 0x36 << 1 , VersionReg = 0x37 << 1 ,
  AnalogTestReg = 0x38 << 1 , TestDAC1Reg = 0x39 << 1 , TestDAC2Reg = 0x3A << 1 , TestADCReg = 0x3B << 1
}
 
enum  PCD_Command {
  PCD_Idle = 0x00 , PCD_Mem = 0x01 , PCD_GenerateRandomID = 0x02 , PCD_CalcCRC = 0x03 ,
  PCD_Transmit = 0x04 , PCD_NoCmdChange = 0x07 , PCD_Receive = 0x08 , PCD_Transceive = 0x0C ,
  PCD_MFAuthent = 0x0E , PCD_SoftReset = 0x0F , PCD_Idle = 0x00 , PCD_Mem = 0x01 ,
  PCD_GenerateRandomID = 0x02 , PCD_CalcCRC = 0x03 , PCD_Transmit = 0x04 , PCD_NoCmdChange = 0x07 ,
  PCD_Receive = 0x08 , PCD_Transceive = 0x0C , PCD_MFAuthent = 0x0E , PCD_SoftReset = 0x0F
}
 
enum  PCD_RxGain {
  RxGain_18dB = 0x00 << 4 , RxGain_23dB = 0x01 << 4 , RxGain_18dB_2 = 0x02 << 4 , RxGain_23dB_2 = 0x03 << 4 ,
  RxGain_33dB = 0x04 << 4 , RxGain_38dB = 0x05 << 4 , RxGain_43dB = 0x06 << 4 , RxGain_48dB = 0x07 << 4 ,
  RxGain_min = 0x00 << 4 , RxGain_avg = 0x04 << 4 , RxGain_max = 0x07 << 4 , RxGain_18dB = 0x00 << 4 ,
  RxGain_23dB = 0x01 << 4 , RxGain_18dB_2 = 0x02 << 4 , RxGain_23dB_2 = 0x03 << 4 , RxGain_33dB = 0x04 << 4 ,
  RxGain_38dB = 0x05 << 4 , RxGain_43dB = 0x06 << 4 , RxGain_48dB = 0x07 << 4 , RxGain_min = 0x00 << 4 ,
  RxGain_avg = 0x04 << 4 , RxGain_max = 0x07 << 4
}
 
enum  PICC_Command {
  PICC_CMD_REQA = 0x26 , PICC_CMD_WUPA = 0x52 , PICC_CMD_CT = 0x88 , PICC_CMD_SEL_CL1 = 0x93 ,
  PICC_CMD_SEL_CL2 = 0x95 , PICC_CMD_SEL_CL3 = 0x97 , PICC_CMD_HLTA = 0x50 , PICC_CMD_MF_AUTH_KEY_A = 0x60 ,
  PICC_CMD_MF_AUTH_KEY_B = 0x61 , PICC_CMD_MF_READ = 0x30 , PICC_CMD_MF_WRITE = 0xA0 , PICC_CMD_MF_DECREMENT = 0xC0 ,
  PICC_CMD_MF_INCREMENT = 0xC1 , PICC_CMD_MF_RESTORE = 0xC2 , PICC_CMD_MF_TRANSFER = 0xB0 , PICC_CMD_UL_WRITE = 0xA2 ,
  PICC_CMD_REQA = 0x26 , PICC_CMD_WUPA = 0x52 , PICC_CMD_CT = 0x88 , PICC_CMD_SEL_CL1 = 0x93 ,
  PICC_CMD_SEL_CL2 = 0x95 , PICC_CMD_SEL_CL3 = 0x97 , PICC_CMD_HLTA = 0x50 , PICC_CMD_MF_AUTH_KEY_A = 0x60 ,
  PICC_CMD_MF_AUTH_KEY_B = 0x61 , PICC_CMD_MF_READ = 0x30 , PICC_CMD_MF_WRITE = 0xA0 , PICC_CMD_MF_DECREMENT = 0xC0 ,
  PICC_CMD_MF_INCREMENT = 0xC1 , PICC_CMD_MF_RESTORE = 0xC2 , PICC_CMD_MF_TRANSFER = 0xB0 , PICC_CMD_UL_WRITE = 0xA2
}
 
enum  MIFARE_Misc { MF_ACK = 0xA , MF_KEY_SIZE = 6 , MF_ACK = 0xA , MF_KEY_SIZE = 6 }
 
enum  PICC_Type {
  PICC_TYPE_UNKNOWN = 0 , PICC_TYPE_ISO_14443_4 = 1 , PICC_TYPE_ISO_18092 = 2 , PICC_TYPE_MIFARE_MINI = 3 ,
  PICC_TYPE_MIFARE_1K = 4 , PICC_TYPE_MIFARE_4K = 5 , PICC_TYPE_MIFARE_UL = 6 , PICC_TYPE_MIFARE_PLUS = 7 ,
  PICC_TYPE_TNP3XXX = 8 , PICC_TYPE_NOT_COMPLETE = 255 , PICC_TYPE_UNKNOWN = 0 , PICC_TYPE_ISO_14443_4 = 1 ,
  PICC_TYPE_ISO_18092 = 2 , PICC_TYPE_MIFARE_MINI = 3 , PICC_TYPE_MIFARE_1K = 4 , PICC_TYPE_MIFARE_4K = 5 ,
  PICC_TYPE_MIFARE_UL = 6 , PICC_TYPE_MIFARE_PLUS = 7 , PICC_TYPE_TNP3XXX = 8 , PICC_TYPE_NOT_COMPLETE = 255
}
 
enum  StatusCode {
  STATUS_OK = 1 , STATUS_ERROR = 2 , STATUS_COLLISION = 3 , STATUS_TIMEOUT = 4 ,
  STATUS_NO_ROOM = 5 , STATUS_INTERNAL_ERROR = 6 , STATUS_INVALID = 7 , STATUS_CRC_WRONG = 8 ,
  STATUS_MIFARE_NACK = 9 , STATUS_OK = 1 , STATUS_ERROR = 2 , STATUS_COLLISION = 3 ,
  STATUS_TIMEOUT = 4 , STATUS_NO_ROOM = 5 , STATUS_INTERNAL_ERROR = 6 , STATUS_INVALID = 7 ,
  STATUS_CRC_WRONG = 8 , STATUS_MIFARE_NACK = 9
}
 

Public Member Functions

 MFRC522 (ISpi &, IGpio &resetPin)
 
void PCD_WriteRegister (uint8_t reg, uint8_t value)
 
void PCD_WriteRegister (uint8_t reg, uint8_t count, uint8_t *values)
 
uint8_t PCD_ReadRegister (uint8_t reg)
 
void PCD_ReadRegister (uint8_t reg, uint8_t count, uint8_t *values, uint8_t rxAlign=0)
 
void setBitMask (unsigned char reg, unsigned char mask)
 
void PCD_SetRegisterBitMask (uint8_t reg, uint8_t mask)
 
void PCD_ClearRegisterBitMask (uint8_t reg, uint8_t mask)
 
uint8_t PCD_CalculateCRC (uint8_t *data, uint8_t length, uint8_t *result)
 
void PCD_Init ()
 
void PCD_Reset ()
 
void PCD_AntennaOn ()
 
void PCD_AntennaOff ()
 
uint8_t PCD_GetAntennaGain ()
 
void PCD_SetAntennaGain (uint8_t mask)
 
bool PCD_PerformSelfTest ()
 
uint8_t PCD_TransceiveData (uint8_t *sendData, uint8_t sendLen, uint8_t *backData, uint8_t *backLen, uint8_t *validBits=NULL, uint8_t rxAlign=0, bool checkCRC=false)
 
uint8_t PCD_CommunicateWithPICC (uint8_t command, uint8_t waitIRq, uint8_t *sendData, uint8_t sendLen, uint8_t *backData=NULL, uint8_t *backLen=NULL, uint8_t *validBits=NULL, uint8_t rxAlign=0, bool checkCRC=false)
 
uint8_t PICC_RequestA (uint8_t *bufferATQA, uint8_t *bufferSize)
 
uint8_t PICC_WakeupA (uint8_t *bufferATQA, uint8_t *bufferSize)
 
uint8_t PICC_REQA_or_WUPA (uint8_t command, uint8_t *bufferATQA, uint8_t *bufferSize)
 
uint8_t PICC_Select (Uid *uid, uint8_t validBits=0)
 
uint8_t PICC_HaltA ()
 
uint8_t PCD_Authenticate (uint8_t command, uint8_t blockAddr, MIFARE_Key *key, Uid *uid)
 
void PCD_StopCrypto1 ()
 
uint8_t MIFARE_Read (uint8_t blockAddr, uint8_t *buffer, uint8_t *bufferSize)
 
uint8_t MIFARE_Write (uint8_t blockAddr, uint8_t *buffer, uint8_t bufferSize)
 
uint8_t MIFARE_Decrement (uint8_t blockAddr, long delta)
 
uint8_t MIFARE_Increment (uint8_t blockAddr, long delta)
 
uint8_t MIFARE_Restore (uint8_t blockAddr)
 
uint8_t MIFARE_Transfer (uint8_t blockAddr)
 
uint8_t MIFARE_Ultralight_Write (uint8_t page, uint8_t *buffer, uint8_t bufferSize)
 
uint8_t MIFARE_GetValue (uint8_t blockAddr, long *value)
 
uint8_t MIFARE_SetValue (uint8_t blockAddr, long value)
 
uint8_t PCD_MIFARE_Transceive (uint8_t *sendData, uint8_t sendLen, bool acceptTimeout=false)
 
const string GetStatusCodeName (uint8_t code)
 
uint8_t PICC_GetType (uint8_t sak)
 
const string PICC_GetTypeName (uint8_t type)
 
void PICC_DumpToSerial (Uid *uid)
 
void PICC_DumpMifareClassicToSerial (Uid *uid, uint8_t piccType, MIFARE_Key *key)
 
void PICC_DumpMifareClassicSectorToSerial (Uid *uid, MIFARE_Key *key, uint8_t sector)
 
void PICC_DumpMifareUltralightToSerial ()
 
void MIFARE_SetAccessBits (uint8_t *accessBitBuffer, uint8_t g0, uint8_t g1, uint8_t g2, uint8_t g3)
 
bool MIFARE_OpenUidBackdoor (bool logErrors)
 
bool MIFARE_SetUid (uint8_t *newUid, uint8_t uidSize, bool logErrors)
 
bool MIFARE_UnbrickUidSector (bool logErrors)
 
bool PICC_IsNewCardPresent ()
 
bool PICC_ReadCardSerial ()
 
 MFRC522 (ISpi &, IGpio &resetPin)
 
void PCD_WriteRegister (uint8_t reg, uint8_t value)
 
void PCD_WriteRegister (uint8_t reg, uint8_t count, uint8_t *values)
 
uint8_t PCD_ReadRegister (uint8_t reg)
 
void PCD_ReadRegister (uint8_t reg, uint8_t count, uint8_t *values, uint8_t rxAlign=0)
 
void setBitMask (unsigned char reg, unsigned char mask)
 
void PCD_SetRegisterBitMask (uint8_t reg, uint8_t mask)
 
void PCD_ClearRegisterBitMask (uint8_t reg, uint8_t mask)
 
uint8_t PCD_CalculateCRC (uint8_t *data, uint8_t length, uint8_t *result)
 
void PCD_Init ()
 
void PCD_Reset ()
 
void PCD_AntennaOn ()
 
void PCD_AntennaOff ()
 
uint8_t PCD_GetAntennaGain ()
 
void PCD_SetAntennaGain (uint8_t mask)
 
bool PCD_PerformSelfTest ()
 
uint8_t PCD_TransceiveData (uint8_t *sendData, uint8_t sendLen, uint8_t *backData, uint8_t *backLen, uint8_t *validBits=NULL, uint8_t rxAlign=0, bool checkCRC=false)
 
uint8_t PCD_CommunicateWithPICC (uint8_t command, uint8_t waitIRq, uint8_t *sendData, uint8_t sendLen, uint8_t *backData=NULL, uint8_t *backLen=NULL, uint8_t *validBits=NULL, uint8_t rxAlign=0, bool checkCRC=false)
 
uint8_t PICC_RequestA (uint8_t *bufferATQA, uint8_t *bufferSize)
 
uint8_t PICC_WakeupA (uint8_t *bufferATQA, uint8_t *bufferSize)
 
uint8_t PICC_REQA_or_WUPA (uint8_t command, uint8_t *bufferATQA, uint8_t *bufferSize)
 
uint8_t PICC_Select (Uid *uid, uint8_t validBits=0)
 
uint8_t PICC_HaltA ()
 
uint8_t PCD_Authenticate (uint8_t command, uint8_t blockAddr, MIFARE_Key *key, Uid *uid)
 
void PCD_StopCrypto1 ()
 
uint8_t MIFARE_Read (uint8_t blockAddr, uint8_t *buffer, uint8_t *bufferSize)
 
uint8_t MIFARE_Write (uint8_t blockAddr, uint8_t *buffer, uint8_t bufferSize)
 
uint8_t MIFARE_Decrement (uint8_t blockAddr, long delta)
 
uint8_t MIFARE_Increment (uint8_t blockAddr, long delta)
 
uint8_t MIFARE_Restore (uint8_t blockAddr)
 
uint8_t MIFARE_Transfer (uint8_t blockAddr)
 
uint8_t MIFARE_Ultralight_Write (uint8_t page, uint8_t *buffer, uint8_t bufferSize)
 
uint8_t MIFARE_GetValue (uint8_t blockAddr, long *value)
 
uint8_t MIFARE_SetValue (uint8_t blockAddr, long value)
 
uint8_t PCD_MIFARE_Transceive (uint8_t *sendData, uint8_t sendLen, bool acceptTimeout=false)
 
const string GetStatusCodeName (uint8_t code)
 
uint8_t PICC_GetType (uint8_t sak)
 
const string PICC_GetTypeName (uint8_t type)
 
void PICC_DumpToSerial (Uid *uid)
 
void PICC_DumpMifareClassicToSerial (Uid *uid, uint8_t piccType, MIFARE_Key *key)
 
void PICC_DumpMifareClassicSectorToSerial (Uid *uid, MIFARE_Key *key, uint8_t sector)
 
void PICC_DumpMifareUltralightToSerial ()
 
void MIFARE_SetAccessBits (uint8_t *accessBitBuffer, uint8_t g0, uint8_t g1, uint8_t g2, uint8_t g3)
 
bool MIFARE_OpenUidBackdoor (bool logErrors)
 
bool MIFARE_SetUid (uint8_t *newUid, uint8_t uidSize, bool logErrors)
 
bool MIFARE_UnbrickUidSector (bool logErrors)
 
bool PICC_IsNewCardPresent ()
 
bool PICC_ReadCardSerial ()
 

Public Attributes

Uid uid
 
ISpimSpi
 
IGpiomResetPin
 

Static Public Attributes

static const uint8_t FIFO_SIZE = 64
 

Member Enumeration Documentation

◆ MIFARE_Misc [1/2]

Enumerator
MF_ACK 
MF_KEY_SIZE 
MF_ACK 
MF_KEY_SIZE 

◆ MIFARE_Misc [2/2]

Enumerator
MF_ACK 
MF_KEY_SIZE 
MF_ACK 
MF_KEY_SIZE 

◆ PCD_Command [1/2]

Enumerator
PCD_Idle 
PCD_Mem 
PCD_GenerateRandomID 
PCD_CalcCRC 
PCD_Transmit 
PCD_NoCmdChange 
PCD_Receive 
PCD_Transceive 
PCD_MFAuthent 
PCD_SoftReset 
PCD_Idle 
PCD_Mem 
PCD_GenerateRandomID 
PCD_CalcCRC 
PCD_Transmit 
PCD_NoCmdChange 
PCD_Receive 
PCD_Transceive 
PCD_MFAuthent 
PCD_SoftReset 

◆ PCD_Command [2/2]

Enumerator
PCD_Idle 
PCD_Mem 
PCD_GenerateRandomID 
PCD_CalcCRC 
PCD_Transmit 
PCD_NoCmdChange 
PCD_Receive 
PCD_Transceive 
PCD_MFAuthent 
PCD_SoftReset 
PCD_Idle 
PCD_Mem 
PCD_GenerateRandomID 
PCD_CalcCRC 
PCD_Transmit 
PCD_NoCmdChange 
PCD_Receive 
PCD_Transceive 
PCD_MFAuthent 
PCD_SoftReset 

◆ PCD_Register [1/2]

Enumerator
CommandReg 
ComIEnReg 
DivIEnReg 
ComIrqReg 
DivIrqReg 
ErrorReg 
Status1Reg 
Status2Reg 
FIFODataReg 
FIFOLevelReg 
WaterLevelReg 
ControlReg 
BitFramingReg 
CollReg 
ModeReg 
TxModeReg 
RxModeReg 
TxControlReg 
TxASKReg 
TxSelReg 
RxSelReg 
RxThresholdReg 
DemodReg 
MfTxReg 
MfRxReg 
SerialSpeedReg 
CRCResultRegH 
CRCResultRegL 
ModWidthReg 
RFCfgReg 
GsNReg 
CWGsPReg 
ModGsPReg 
TModeReg 
TPrescalerReg 
TReloadRegH 
TReloadRegL 
TCounterValueRegH 
TCounterValueRegL 
TestSel1Reg 
TestSel2Reg 
TestPinEnReg 
TestPinValueReg 
TestBusReg 
AutoTestReg 
VersionReg 
AnalogTestReg 
TestDAC1Reg 
TestDAC2Reg 
TestADCReg 
CommandReg 
ComIEnReg 
DivIEnReg 
ComIrqReg 
DivIrqReg 
ErrorReg 
Status1Reg 
Status2Reg 
FIFODataReg 
FIFOLevelReg 
WaterLevelReg 
ControlReg 
BitFramingReg 
CollReg 
ModeReg 
TxModeReg 
RxModeReg 
TxControlReg 
TxASKReg 
TxSelReg 
RxSelReg 
RxThresholdReg 
DemodReg 
MfTxReg 
MfRxReg 
SerialSpeedReg 
CRCResultRegH 
CRCResultRegL 
ModWidthReg 
RFCfgReg 
GsNReg 
CWGsPReg 
ModGsPReg 
TModeReg 
TPrescalerReg 
TReloadRegH 
TReloadRegL 
TCounterValueRegH 
TCounterValueRegL 
TestSel1Reg 
TestSel2Reg 
TestPinEnReg 
TestPinValueReg 
TestBusReg 
AutoTestReg 
VersionReg 
AnalogTestReg 
TestDAC1Reg 
TestDAC2Reg 
TestADCReg 

◆ PCD_Register [2/2]

Enumerator
CommandReg 
ComIEnReg 
DivIEnReg 
ComIrqReg 
DivIrqReg 
ErrorReg 
Status1Reg 
Status2Reg 
FIFODataReg 
FIFOLevelReg 
WaterLevelReg 
ControlReg 
BitFramingReg 
CollReg 
ModeReg 
TxModeReg 
RxModeReg 
TxControlReg 
TxASKReg 
TxSelReg 
RxSelReg 
RxThresholdReg 
DemodReg 
MfTxReg 
MfRxReg 
SerialSpeedReg 
CRCResultRegH 
CRCResultRegL 
ModWidthReg 
RFCfgReg 
GsNReg 
CWGsPReg 
ModGsPReg 
TModeReg 
TPrescalerReg 
TReloadRegH 
TReloadRegL 
TCounterValueRegH 
TCounterValueRegL 
TestSel1Reg 
TestSel2Reg 
TestPinEnReg 
TestPinValueReg 
TestBusReg 
AutoTestReg 
VersionReg 
AnalogTestReg 
TestDAC1Reg 
TestDAC2Reg 
TestADCReg 
CommandReg 
ComIEnReg 
DivIEnReg 
ComIrqReg 
DivIrqReg 
ErrorReg 
Status1Reg 
Status2Reg 
FIFODataReg 
FIFOLevelReg 
WaterLevelReg 
ControlReg 
BitFramingReg 
CollReg 
ModeReg 
TxModeReg 
RxModeReg 
TxControlReg 
TxASKReg 
TxSelReg 
RxSelReg 
RxThresholdReg 
DemodReg 
MfTxReg 
MfRxReg 
SerialSpeedReg 
CRCResultRegH 
CRCResultRegL 
ModWidthReg 
RFCfgReg 
GsNReg 
CWGsPReg 
ModGsPReg 
TModeReg 
TPrescalerReg 
TReloadRegH 
TReloadRegL 
TCounterValueRegH 
TCounterValueRegL 
TestSel1Reg 
TestSel2Reg 
TestPinEnReg 
TestPinValueReg 
TestBusReg 
AutoTestReg 
VersionReg 
AnalogTestReg 
TestDAC1Reg 
TestDAC2Reg 
TestADCReg 

◆ PCD_RxGain [1/2]

Enumerator
RxGain_18dB 
RxGain_23dB 
RxGain_18dB_2 
RxGain_23dB_2 
RxGain_33dB 
RxGain_38dB 
RxGain_43dB 
RxGain_48dB 
RxGain_min 
RxGain_avg 
RxGain_max 
RxGain_18dB 
RxGain_23dB 
RxGain_18dB_2 
RxGain_23dB_2 
RxGain_33dB 
RxGain_38dB 
RxGain_43dB 
RxGain_48dB 
RxGain_min 
RxGain_avg 
RxGain_max 

◆ PCD_RxGain [2/2]

Enumerator
RxGain_18dB 
RxGain_23dB 
RxGain_18dB_2 
RxGain_23dB_2 
RxGain_33dB 
RxGain_38dB 
RxGain_43dB 
RxGain_48dB 
RxGain_min 
RxGain_avg 
RxGain_max 
RxGain_18dB 
RxGain_23dB 
RxGain_18dB_2 
RxGain_23dB_2 
RxGain_33dB 
RxGain_38dB 
RxGain_43dB 
RxGain_48dB 
RxGain_min 
RxGain_avg 
RxGain_max 

◆ PICC_Command [1/2]

Enumerator
PICC_CMD_REQA 
PICC_CMD_WUPA 
PICC_CMD_CT 
PICC_CMD_SEL_CL1 
PICC_CMD_SEL_CL2 
PICC_CMD_SEL_CL3 
PICC_CMD_HLTA 
PICC_CMD_MF_AUTH_KEY_A 
PICC_CMD_MF_AUTH_KEY_B 
PICC_CMD_MF_READ 
PICC_CMD_MF_WRITE 
PICC_CMD_MF_DECREMENT 
PICC_CMD_MF_INCREMENT 
PICC_CMD_MF_RESTORE 
PICC_CMD_MF_TRANSFER 
PICC_CMD_UL_WRITE 
PICC_CMD_REQA 
PICC_CMD_WUPA 
PICC_CMD_CT 
PICC_CMD_SEL_CL1 
PICC_CMD_SEL_CL2 
PICC_CMD_SEL_CL3 
PICC_CMD_HLTA 
PICC_CMD_MF_AUTH_KEY_A 
PICC_CMD_MF_AUTH_KEY_B 
PICC_CMD_MF_READ 
PICC_CMD_MF_WRITE 
PICC_CMD_MF_DECREMENT 
PICC_CMD_MF_INCREMENT 
PICC_CMD_MF_RESTORE 
PICC_CMD_MF_TRANSFER 
PICC_CMD_UL_WRITE 

◆ PICC_Command [2/2]

Enumerator
PICC_CMD_REQA 
PICC_CMD_WUPA 
PICC_CMD_CT 
PICC_CMD_SEL_CL1 
PICC_CMD_SEL_CL2 
PICC_CMD_SEL_CL3 
PICC_CMD_HLTA 
PICC_CMD_MF_AUTH_KEY_A 
PICC_CMD_MF_AUTH_KEY_B 
PICC_CMD_MF_READ 
PICC_CMD_MF_WRITE 
PICC_CMD_MF_DECREMENT 
PICC_CMD_MF_INCREMENT 
PICC_CMD_MF_RESTORE 
PICC_CMD_MF_TRANSFER 
PICC_CMD_UL_WRITE 
PICC_CMD_REQA 
PICC_CMD_WUPA 
PICC_CMD_CT 
PICC_CMD_SEL_CL1 
PICC_CMD_SEL_CL2 
PICC_CMD_SEL_CL3 
PICC_CMD_HLTA 
PICC_CMD_MF_AUTH_KEY_A 
PICC_CMD_MF_AUTH_KEY_B 
PICC_CMD_MF_READ 
PICC_CMD_MF_WRITE 
PICC_CMD_MF_DECREMENT 
PICC_CMD_MF_INCREMENT 
PICC_CMD_MF_RESTORE 
PICC_CMD_MF_TRANSFER 
PICC_CMD_UL_WRITE 

◆ PICC_Type [1/2]

Enumerator
PICC_TYPE_UNKNOWN 
PICC_TYPE_ISO_14443_4 
PICC_TYPE_ISO_18092 
PICC_TYPE_MIFARE_MINI 
PICC_TYPE_MIFARE_1K 
PICC_TYPE_MIFARE_4K 
PICC_TYPE_MIFARE_UL 
PICC_TYPE_MIFARE_PLUS 
PICC_TYPE_TNP3XXX 
PICC_TYPE_NOT_COMPLETE 
PICC_TYPE_UNKNOWN 
PICC_TYPE_ISO_14443_4 
PICC_TYPE_ISO_18092 
PICC_TYPE_MIFARE_MINI 
PICC_TYPE_MIFARE_1K 
PICC_TYPE_MIFARE_4K 
PICC_TYPE_MIFARE_UL 
PICC_TYPE_MIFARE_PLUS 
PICC_TYPE_TNP3XXX 
PICC_TYPE_NOT_COMPLETE 

◆ PICC_Type [2/2]

Enumerator
PICC_TYPE_UNKNOWN 
PICC_TYPE_ISO_14443_4 
PICC_TYPE_ISO_18092 
PICC_TYPE_MIFARE_MINI 
PICC_TYPE_MIFARE_1K 
PICC_TYPE_MIFARE_4K 
PICC_TYPE_MIFARE_UL 
PICC_TYPE_MIFARE_PLUS 
PICC_TYPE_TNP3XXX 
PICC_TYPE_NOT_COMPLETE 
PICC_TYPE_UNKNOWN 
PICC_TYPE_ISO_14443_4 
PICC_TYPE_ISO_18092 
PICC_TYPE_MIFARE_MINI 
PICC_TYPE_MIFARE_1K 
PICC_TYPE_MIFARE_4K 
PICC_TYPE_MIFARE_UL 
PICC_TYPE_MIFARE_PLUS 
PICC_TYPE_TNP3XXX 
PICC_TYPE_NOT_COMPLETE 

◆ StatusCode [1/2]

Enumerator
STATUS_OK 
STATUS_ERROR 
STATUS_COLLISION 
STATUS_TIMEOUT 
STATUS_NO_ROOM 
STATUS_INTERNAL_ERROR 
STATUS_INVALID 
STATUS_CRC_WRONG 
STATUS_MIFARE_NACK 
STATUS_OK 
STATUS_ERROR 
STATUS_COLLISION 
STATUS_TIMEOUT 
STATUS_NO_ROOM 
STATUS_INTERNAL_ERROR 
STATUS_INVALID 
STATUS_CRC_WRONG 
STATUS_MIFARE_NACK 

◆ StatusCode [2/2]

Enumerator
STATUS_OK 
STATUS_ERROR 
STATUS_COLLISION 
STATUS_TIMEOUT 
STATUS_NO_ROOM 
STATUS_INTERNAL_ERROR 
STATUS_INVALID 
STATUS_CRC_WRONG 
STATUS_MIFARE_NACK 
STATUS_OK 
STATUS_ERROR 
STATUS_COLLISION 
STATUS_TIMEOUT 
STATUS_NO_ROOM 
STATUS_INTERNAL_ERROR 
STATUS_INVALID 
STATUS_CRC_WRONG 
STATUS_MIFARE_NACK 

Constructor & Destructor Documentation

◆ MFRC522() [1/2]

mfrc522::MFRC522::MFRC522 ( ISpi spi,
IGpio resetPin 
)

Constructor.

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◆ MFRC522() [2/2]

mfrc522::MFRC522::MFRC522 ( ISpi ,
IGpio resetPin 
)

Member Function Documentation

◆ GetStatusCodeName() [1/2]

const string mfrc522::MFRC522::GetStatusCodeName ( uint8_t  code)

Returns a __FlashStringHelper pointer to a status code name.

Parameters
codeOne of the StatusCode enums.
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◆ GetStatusCodeName() [2/2]

const string mfrc522::MFRC522::GetStatusCodeName ( uint8_t  code)

◆ MIFARE_Decrement() [1/2]

uint8_t mfrc522::MFRC522::MIFARE_Decrement ( uint8_t  blockAddr,
long  delta 
)

MIFARE Decrement subtracts the delta from the value of the addressed block, and stores the result in a volatile memory. For MIFARE Classic only. The sector containing the block must be authenticated before calling this function. Only for blocks in "value block" mode, ie with access bits [C1 C2 C3] = [110] or [001]. Use MIFARE_Transfer() to store the result in a block.

Returns
STATUS_OK on success, STATUS_??? otherwise.
Parameters
blockAddrThe block (0-0xff) number.
deltaThis number is subtracted from the value of block blockAddr.

◆ MIFARE_Decrement() [2/2]

uint8_t mfrc522::MFRC522::MIFARE_Decrement ( uint8_t  blockAddr,
long  delta 
)

◆ MIFARE_GetValue() [1/2]

uint8_t mfrc522::MFRC522::MIFARE_GetValue ( uint8_t  blockAddr,
long *  value 
)

Helper routine to read the current value from a Value Block.

Only for MIFARE Classic and only for blocks in "value block" mode, that is: with access bits [C1 C2 C3] = [110] or [001]. The sector containing the block must be authenticated before calling this function.

Parameters
[in]blockAddrThe block (0x00-0xff) number.
[out]valueCurrent value of the Value Block.
Returns
STATUS_OK on success, STATUS_??? otherwise.
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◆ MIFARE_GetValue() [2/2]

uint8_t mfrc522::MFRC522::MIFARE_GetValue ( uint8_t  blockAddr,
long *  value 
)

◆ MIFARE_Increment() [1/2]

uint8_t mfrc522::MFRC522::MIFARE_Increment ( uint8_t  blockAddr,
long  delta 
)

MIFARE Increment adds the delta to the value of the addressed block, and stores the result in a volatile memory. For MIFARE Classic only. The sector containing the block must be authenticated before calling this function. Only for blocks in "value block" mode, ie with access bits [C1 C2 C3] = [110] or [001]. Use MIFARE_Transfer() to store the result in a block.

Returns
STATUS_OK on success, STATUS_??? otherwise.
Parameters
blockAddrThe block (0-0xff) number.
deltaThis number is added to the value of block blockAddr.

◆ MIFARE_Increment() [2/2]

uint8_t mfrc522::MFRC522::MIFARE_Increment ( uint8_t  blockAddr,
long  delta 
)

◆ MIFARE_OpenUidBackdoor() [1/2]

bool mfrc522::MFRC522::MIFARE_OpenUidBackdoor ( bool  logErrors)

Performs the "magic sequence" needed to get Chinese UID changeable Mifare cards to allow writing to sector 0, where the card UID is stored.

Note that you do not need to have selected the card through REQA or WUPA, this sequence works immediately when the card is in the reader vicinity. This means you can use this method even on "bricked" cards that your reader does not recognise anymore (see MFRC522::MIFARE_UnbrickUidSector).

Of course with non-bricked devices, you're free to select them before calling this function.

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◆ MIFARE_OpenUidBackdoor() [2/2]

bool mfrc522::MFRC522::MIFARE_OpenUidBackdoor ( bool  logErrors)

◆ MIFARE_Read() [1/2]

uint8_t mfrc522::MFRC522::MIFARE_Read ( uint8_t  blockAddr,
uint8_t *  buffer,
uint8_t *  bufferSize 
)

Reads 16 bytes (+ 2 bytes CRC_A) from the active PICC.

For MIFARE Classic the sector containing the block must be authenticated before calling this function.

For MIFARE Ultralight only addresses 00h to 0Fh are decoded. The MF0ICU1 returns a NAK for higher addresses. The MF0ICU1 responds to the READ command by sending 16 bytes starting from the page address defined by the command argument. For example; if blockAddr is 03h then pages 03h, 04h, 05h, 06h are returned. A roll-back is implemented: If blockAddr is 0Eh, then the contents of pages 0Eh, 0Fh, 00h and 01h are returned.

The buffer must be at least 18 bytes because a CRC_A is also returned. Checks the CRC_A before returning STATUS_OK.

Returns
STATUS_OK on success, STATUS_??? otherwise.
Parameters
blockAddrMIFARE Classic: The block (0-0xff) number. MIFARE Ultralight: The first page to return data from.
bufferThe buffer to store the data in
bufferSizeBuffer size, at least 18 bytes. Also number of bytes returned if STATUS_OK.
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◆ MIFARE_Read() [2/2]

uint8_t mfrc522::MFRC522::MIFARE_Read ( uint8_t  blockAddr,
uint8_t *  buffer,
uint8_t *  bufferSize 
)

◆ MIFARE_Restore() [1/2]

uint8_t mfrc522::MFRC522::MIFARE_Restore ( uint8_t  blockAddr)

MIFARE Restore copies the value of the addressed block into a volatile memory. For MIFARE Classic only. The sector containing the block must be authenticated before calling this function. Only for blocks in "value block" mode, ie with access bits [C1 C2 C3] = [110] or [001]. Use MIFARE_Transfer() to store the result in a block.

Returns
STATUS_OK on success, STATUS_??? otherwise.
Parameters
blockAddrThe block (0-0xff) number.

◆ MIFARE_Restore() [2/2]

uint8_t mfrc522::MFRC522::MIFARE_Restore ( uint8_t  blockAddr)

◆ MIFARE_SetAccessBits() [1/2]

void mfrc522::MFRC522::MIFARE_SetAccessBits ( uint8_t *  accessBitBuffer,
uint8_t  g0,
uint8_t  g1,
uint8_t  g2,
uint8_t  g3 
)

Calculates the bit pattern needed for the specified access bits. In the [C1 C2 C3] tupples C1 is MSB (=4) and C3 is LSB (=1).

Parameters
accessBitBufferPointer to byte 6, 7 and 8 in the sector trailer. Bytes [0..2] will be set.
g0Access bits [C1 C2 C3] for block 0 (for sectors 0-31) or blocks 0-4 (for sectors 32-39)
g1Access bits C1 C2 C3] for block 1 (for sectors 0-31) or blocks 5-9 (for sectors 32-39)
g2Access bits C1 C2 C3] for block 2 (for sectors 0-31) or blocks 10-14 (for sectors 32-39)
g3Access bits C1 C2 C3] for the sector trailer, block 3 (for sectors 0-31) or block 15 (for sectors 32-39)

◆ MIFARE_SetAccessBits() [2/2]

void mfrc522::MFRC522::MIFARE_SetAccessBits ( uint8_t *  accessBitBuffer,
uint8_t  g0,
uint8_t  g1,
uint8_t  g2,
uint8_t  g3 
)

◆ MIFARE_SetUid() [1/2]

bool mfrc522::MFRC522::MIFARE_SetUid ( uint8_t *  newUid,
uint8_t  uidSize,
bool  logErrors 
)

Reads entire block 0, including all manufacturer data, and overwrites that block with the new UID, a freshly calculated BCC, and the original manufacturer data.

It assumes a default KEY A of 0xFFFFFFFFFFFF. Make sure to have selected the card before this function is called.

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◆ MIFARE_SetUid() [2/2]

bool mfrc522::MFRC522::MIFARE_SetUid ( uint8_t *  newUid,
uint8_t  uidSize,
bool  logErrors 
)

◆ MIFARE_SetValue() [1/2]

uint8_t mfrc522::MFRC522::MIFARE_SetValue ( uint8_t  blockAddr,
long  value 
)

Helper routine to write a specific value into a Value Block.

Only for MIFARE Classic and only for blocks in "value block" mode, that is: with access bits [C1 C2 C3] = [110] or [001]. The sector containing the block must be authenticated before calling this function.

Parameters
[in]blockAddrThe block (0x00-0xff) number.
[in]valueNew value of the Value Block.
Returns
STATUS_OK on success, STATUS_??? otherwise.
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◆ MIFARE_SetValue() [2/2]

uint8_t mfrc522::MFRC522::MIFARE_SetValue ( uint8_t  blockAddr,
long  value 
)

◆ MIFARE_Transfer() [1/2]

uint8_t mfrc522::MFRC522::MIFARE_Transfer ( uint8_t  blockAddr)

MIFARE Transfer writes the value stored in the volatile memory into one MIFARE Classic block. For MIFARE Classic only. The sector containing the block must be authenticated before calling this function. Only for blocks in "value block" mode, ie with access bits [C1 C2 C3] = [110] or [001].

Returns
STATUS_OK on success, STATUS_??? otherwise.
Parameters
blockAddrThe block (0-0xff) number.
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◆ MIFARE_Transfer() [2/2]

uint8_t mfrc522::MFRC522::MIFARE_Transfer ( uint8_t  blockAddr)

◆ MIFARE_Ultralight_Write() [1/2]

uint8_t mfrc522::MFRC522::MIFARE_Ultralight_Write ( uint8_t  page,
uint8_t *  buffer,
uint8_t  bufferSize 
)

Writes a 4 byte page to the active MIFARE Ultralight PICC.

Returns
STATUS_OK on success, STATUS_??? otherwise.
Parameters
pageThe page (2-15) to write to.
bufferThe 4 bytes to write to the PICC
bufferSizeBuffer size, must be at least 4 bytes. Exactly 4 bytes are written.
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◆ MIFARE_Ultralight_Write() [2/2]

uint8_t mfrc522::MFRC522::MIFARE_Ultralight_Write ( uint8_t  page,
uint8_t *  buffer,
uint8_t  bufferSize 
)

◆ MIFARE_UnbrickUidSector() [1/2]

bool mfrc522::MFRC522::MIFARE_UnbrickUidSector ( bool  logErrors)

Resets entire sector 0 to zeroes, so the card can be read again by readers.

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◆ MIFARE_UnbrickUidSector() [2/2]

bool mfrc522::MFRC522::MIFARE_UnbrickUidSector ( bool  logErrors)

◆ MIFARE_Write() [1/2]

uint8_t mfrc522::MFRC522::MIFARE_Write ( uint8_t  blockAddr,
uint8_t *  buffer,
uint8_t  bufferSize 
)

Writes 16 bytes to the active PICC.

For MIFARE Classic the sector containing the block must be authenticated before calling this function.

For MIFARE Ultralight the operation is called "COMPATIBILITY WRITE". Even though 16 bytes are transferred to the Ultralight PICC, only the least significant 4 bytes (bytes 0 to 3) are written to the specified address. It is recommended to set the remaining bytes 04h to 0Fh to all logic 0.

  • Returns
    STATUS_OK on success, STATUS_??? otherwise.
Parameters
blockAddrMIFARE Classic: The block (0-0xff) number. MIFARE Ultralight: The page (2-15) to write to.
bufferThe 16 bytes to write to the PICC
bufferSizeBuffer size, must be at least 16 bytes. Exactly 16 bytes are written.
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◆ MIFARE_Write() [2/2]

uint8_t mfrc522::MFRC522::MIFARE_Write ( uint8_t  blockAddr,
uint8_t *  buffer,
uint8_t  bufferSize 
)

◆ PCD_AntennaOff() [1/2]

void mfrc522::MFRC522::PCD_AntennaOff ( )

Turns the antenna off by disabling pins TX1 and TX2.

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◆ PCD_AntennaOff() [2/2]

void mfrc522::MFRC522::PCD_AntennaOff ( )

◆ PCD_AntennaOn() [1/2]

void mfrc522::MFRC522::PCD_AntennaOn ( )

Turns the antenna on by enabling pins TX1 and TX2. After a reset these pins are disabled.

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◆ PCD_AntennaOn() [2/2]

void mfrc522::MFRC522::PCD_AntennaOn ( )

◆ PCD_Authenticate() [1/2]

uint8_t mfrc522::MFRC522::PCD_Authenticate ( uint8_t  command,
uint8_t  blockAddr,
MIFARE_Key key,
Uid uid 
)

Executes the MFRC522 MFAuthent command. This command manages MIFARE authentication to enable a secure communication to any MIFARE Mini, MIFARE 1K and MIFARE 4K card. The authentication is described in the MFRC522 datasheet section 10.3.1.9 and http://www.nxp.com/documents/data_sheet/MF1S503x.pdf section 10.1. For use with MIFARE Classic PICCs. The PICC must be selected - ie in state ACTIVE(*) - before calling this function. Remember to call PCD_StopCrypto1() after communicating with the authenticated PICC - otherwise no new communications can start.

All keys are set to FFFFFFFFFFFFh at chip delivery.

Returns
STATUS_OK on success, STATUS_??? otherwise. Probably STATUS_TIMEOUT if you supply the wrong key.
Parameters
commandPICC_CMD_MF_AUTH_KEY_A or PICC_CMD_MF_AUTH_KEY_B
blockAddrThe block number. See numbering in the comments in the .h file.
keyPointer to the Crypteo1 key to use (6 bytes)
uidPointer to Uid struct. The first 4 bytes of the UID is used.
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◆ PCD_Authenticate() [2/2]

uint8_t mfrc522::MFRC522::PCD_Authenticate ( uint8_t  command,
uint8_t  blockAddr,
MIFARE_Key key,
Uid uid 
)

◆ PCD_CalculateCRC() [1/2]

uint8_t mfrc522::MFRC522::PCD_CalculateCRC ( uint8_t *  data,
uint8_t  length,
uint8_t *  result 
)

Use the CRC coprocessor in the MFRC522 to calculate a CRC_A.

Returns
STATUS_OK on success, STATUS_??? otherwise.
Parameters
dataIn: Pointer to the data to transfer to the FIFO for CRC calculation.
lengthIn: The number of bytes to transfer.
resultOut: Pointer to result buffer. Result is written to result[0..1], low byte first.
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◆ PCD_CalculateCRC() [2/2]

uint8_t mfrc522::MFRC522::PCD_CalculateCRC ( uint8_t *  data,
uint8_t  length,
uint8_t *  result 
)

◆ PCD_ClearRegisterBitMask() [1/2]

void mfrc522::MFRC522::PCD_ClearRegisterBitMask ( uint8_t  reg,
uint8_t  mask 
)

Clears the bits given in mask from register reg.

Parameters
regThe register to update. One of the PCD_Register enums.
maskThe bits to clear.
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◆ PCD_ClearRegisterBitMask() [2/2]

void mfrc522::MFRC522::PCD_ClearRegisterBitMask ( uint8_t  reg,
uint8_t  mask 
)

◆ PCD_CommunicateWithPICC() [1/2]

uint8_t mfrc522::MFRC522::PCD_CommunicateWithPICC ( uint8_t  command,
uint8_t  waitIRq,
uint8_t *  sendData,
uint8_t  sendLen,
uint8_t *  backData = NULL,
uint8_t *  backLen = NULL,
uint8_t *  validBits = NULL,
uint8_t  rxAlign = 0,
bool  checkCRC = false 
)

Transfers data to the MFRC522 FIFO, executes a command, waits for completion and transfers data back from the FIFO. CRC validation can only be done if backData and backLen are specified.

Returns
STATUS_OK on success, STATUS_??? otherwise.
Parameters
commandThe command to execute. One of the PCD_Command enums.
waitIRqThe bits in the ComIrqReg register that signals successful completion of the command.
sendDataPointer to the data to transfer to the FIFO.
sendLenNumber of bytes to transfer to the FIFO.
backDataNULL or pointer to buffer if data should be read back after executing the command.
backLenIn: Max number of bytes to write to *backData. Out: The number of bytes returned.
validBitsIn/Out: The number of valid bits in the last byte. 0 for 8 valid bits.
rxAlignIn: Defines the bit position in backData[0] for the first bit received. Default 0.
checkCRCIn: True => The last two bytes of the response is assumed to be a CRC_A that must be validated.
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◆ PCD_CommunicateWithPICC() [2/2]

uint8_t mfrc522::MFRC522::PCD_CommunicateWithPICC ( uint8_t  command,
uint8_t  waitIRq,
uint8_t *  sendData,
uint8_t  sendLen,
uint8_t *  backData = NULL,
uint8_t *  backLen = NULL,
uint8_t *  validBits = NULL,
uint8_t  rxAlign = 0,
bool  checkCRC = false 
)

◆ PCD_GetAntennaGain() [1/2]

uint8_t mfrc522::MFRC522::PCD_GetAntennaGain ( )

Get the current MFRC522 Receiver Gain (RxGain[2:0]) value. See 9.3.3.6 / table 98 in http://www.nxp.com/documents/data_sheet/MFRC522.pdf NOTE: Return value scrubbed with (0x07<<4)=01110000b as RCFfgReg may use reserved bits.

Returns
Value of the RxGain, scrubbed to the 3 bits used.
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◆ PCD_GetAntennaGain() [2/2]

uint8_t mfrc522::MFRC522::PCD_GetAntennaGain ( )

◆ PCD_Init() [1/2]

void mfrc522::MFRC522::PCD_Init ( )

Initializes the MFRC522 chip.

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◆ PCD_Init() [2/2]

void mfrc522::MFRC522::PCD_Init ( )

◆ PCD_MIFARE_Transceive() [1/2]

uint8_t mfrc522::MFRC522::PCD_MIFARE_Transceive ( uint8_t *  sendData,
uint8_t  sendLen,
bool  acceptTimeout = false 
)

Wrapper for MIFARE protocol communication. Adds CRC_A, executes the Transceive command and checks that the response is MF_ACK or a timeout.

Returns
STATUS_OK on success, STATUS_??? otherwise.
Parameters
sendDataPointer to the data to transfer to the FIFO. Do NOT include the CRC_A.
sendLenNumber of bytes in sendData.
acceptTimeoutTrue => A timeout is also success
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◆ PCD_MIFARE_Transceive() [2/2]

uint8_t mfrc522::MFRC522::PCD_MIFARE_Transceive ( uint8_t *  sendData,
uint8_t  sendLen,
bool  acceptTimeout = false 
)

◆ PCD_PerformSelfTest() [1/2]

bool mfrc522::MFRC522::PCD_PerformSelfTest ( )

Performs a self-test of the MFRC522 See 16.1.1 in http://www.nxp.com/documents/data_sheet/MFRC522.pdf

Returns
Whether or not the test passed.
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◆ PCD_PerformSelfTest() [2/2]

bool mfrc522::MFRC522::PCD_PerformSelfTest ( )

◆ PCD_ReadRegister() [1/4]

uint8_t mfrc522::MFRC522::PCD_ReadRegister ( uint8_t  reg)

Reads a byte from the specified register in the MFRC522 chip. The interface is described in the datasheet section 8.1.2.

Parameters
regThe register to read from. One of the PCD_Register enums.
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◆ PCD_ReadRegister() [2/4]

uint8_t mfrc522::MFRC522::PCD_ReadRegister ( uint8_t  reg)

◆ PCD_ReadRegister() [3/4]

void mfrc522::MFRC522::PCD_ReadRegister ( uint8_t  reg,
uint8_t  count,
uint8_t *  values,
uint8_t  rxAlign = 0 
)

Reads a number of bytes from the specified register in the MFRC522 chip. The interface is described in the datasheet section 8.1.2.

Parameters
regThe register to read from. One of the PCD_Register enums.
countThe number of bytes to read
valuesByte array to store the values in.
rxAlignOnly bit positions rxAlign..7 in values[0] are updated.
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◆ PCD_ReadRegister() [4/4]

void mfrc522::MFRC522::PCD_ReadRegister ( uint8_t  reg,
uint8_t  count,
uint8_t *  values,
uint8_t  rxAlign = 0 
)

◆ PCD_Reset() [1/2]

void mfrc522::MFRC522::PCD_Reset ( )

Performs a soft reset on the MFRC522 chip and waits for it to be ready again.

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◆ PCD_Reset() [2/2]

void mfrc522::MFRC522::PCD_Reset ( )

◆ PCD_SetAntennaGain() [1/2]

void mfrc522::MFRC522::PCD_SetAntennaGain ( uint8_t  mask)

Set the MFRC522 Receiver Gain (RxGain) to value specified by given mask. See 9.3.3.6 / table 98 in http://www.nxp.com/documents/data_sheet/MFRC522.pdf NOTE: Given mask is scrubbed with (0x07<<4)=01110000b as RCFfgReg may use reserved bits.

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◆ PCD_SetAntennaGain() [2/2]

void mfrc522::MFRC522::PCD_SetAntennaGain ( uint8_t  mask)

◆ PCD_SetRegisterBitMask() [1/2]

void mfrc522::MFRC522::PCD_SetRegisterBitMask ( uint8_t  reg,
uint8_t  mask 
)

Sets the bits given in mask in register reg.

Parameters
regThe register to update. One of the PCD_Register enums.
maskThe bits to set.
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◆ PCD_SetRegisterBitMask() [2/2]

void mfrc522::MFRC522::PCD_SetRegisterBitMask ( uint8_t  reg,
uint8_t  mask 
)

◆ PCD_StopCrypto1() [1/2]

void mfrc522::MFRC522::PCD_StopCrypto1 ( )

Used to exit the PCD from its authenticated state. Remember to call this function after communicating with an authenticated PICC - otherwise no new communications can start.

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◆ PCD_StopCrypto1() [2/2]

void mfrc522::MFRC522::PCD_StopCrypto1 ( )

◆ PCD_TransceiveData() [1/2]

uint8_t mfrc522::MFRC522::PCD_TransceiveData ( uint8_t *  sendData,
uint8_t  sendLen,
uint8_t *  backData,
uint8_t *  backLen,
uint8_t *  validBits = NULL,
uint8_t  rxAlign = 0,
bool  checkCRC = false 
)

Executes the Transceive command. CRC validation can only be done if backData and backLen are specified.

Returns
STATUS_OK on success, STATUS_??? otherwise.
Parameters
sendDataPointer to the data to transfer to the FIFO.
sendLenNumber of bytes to transfer to the FIFO.
backDataNULL or pointer to buffer if data should be read back after executing the command.
backLenIn: Max number of bytes to write to *backData. Out: The number of bytes returned.
validBitsIn/Out: The number of valid bits in the last byte. 0 for 8 valid bits. Default NULL.
rxAlignIn: Defines the bit position in backData[0] for the first bit received. Default 0.
checkCRCIn: True => The last two bytes of the response is assumed to be a CRC_A that must be validated.
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◆ PCD_TransceiveData() [2/2]

uint8_t mfrc522::MFRC522::PCD_TransceiveData ( uint8_t *  sendData,
uint8_t  sendLen,
uint8_t *  backData,
uint8_t *  backLen,
uint8_t *  validBits = NULL,
uint8_t  rxAlign = 0,
bool  checkCRC = false 
)

◆ PCD_WriteRegister() [1/4]

void mfrc522::MFRC522::PCD_WriteRegister ( uint8_t  reg,
uint8_t  count,
uint8_t *  values 
)

Writes a number of bytes to the specified register in the MFRC522 chip. The interface is described in the datasheet section 8.1.2.

Parameters
regThe register to write to. One of the PCD_Register enums.
countThe number of bytes to write to the register
valuesThe values to write. Byte array.
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◆ PCD_WriteRegister() [2/4]

void mfrc522::MFRC522::PCD_WriteRegister ( uint8_t  reg,
uint8_t  count,
uint8_t *  values 
)

◆ PCD_WriteRegister() [3/4]

void mfrc522::MFRC522::PCD_WriteRegister ( uint8_t  reg,
uint8_t  value 
)

Writes a byte to the specified register in the MFRC522 chip. The interface is described in the datasheet section 8.1.2.

Parameters
regThe register to write to. One of the PCD_Register enums.
valueThe value to write.
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◆ PCD_WriteRegister() [4/4]

void mfrc522::MFRC522::PCD_WriteRegister ( uint8_t  reg,
uint8_t  value 
)

◆ PICC_DumpMifareClassicSectorToSerial() [1/2]

void mfrc522::MFRC522::PICC_DumpMifareClassicSectorToSerial ( Uid uid,
MIFARE_Key key,
uint8_t  sector 
)

Dumps memory contents of a sector of a MIFARE Classic PICC. Uses PCD_Authenticate(), MIFARE_Read() and PCD_StopCrypto1. Always uses PICC_CMD_MF_AUTH_KEY_A because only Key A can always read the sector trailer access bits.

Parameters
uidPointer to Uid struct returned from a successful PICC_Select().
keyKey A for the sector.
sectorThe sector to dump, 0..39.
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◆ PICC_DumpMifareClassicSectorToSerial() [2/2]

void mfrc522::MFRC522::PICC_DumpMifareClassicSectorToSerial ( Uid uid,
MIFARE_Key key,
uint8_t  sector 
)

◆ PICC_DumpMifareClassicToSerial() [1/2]

void mfrc522::MFRC522::PICC_DumpMifareClassicToSerial ( Uid uid,
uint8_t  piccType,
MIFARE_Key key 
)

Dumps memory contents of a MIFARE Classic PICC. On success the PICC is halted after dumping the data.

Parameters
uidPointer to Uid struct returned from a successful PICC_Select().
piccTypeOne of the PICC_Type enums.
keyKey A used for all sectors.
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◆ PICC_DumpMifareClassicToSerial() [2/2]

void mfrc522::MFRC522::PICC_DumpMifareClassicToSerial ( Uid uid,
uint8_t  piccType,
MIFARE_Key key 
)

◆ PICC_DumpMifareUltralightToSerial() [1/2]

void mfrc522::MFRC522::PICC_DumpMifareUltralightToSerial ( )

Dumps memory contents of a MIFARE Ultralight PICC.

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◆ PICC_DumpMifareUltralightToSerial() [2/2]

void mfrc522::MFRC522::PICC_DumpMifareUltralightToSerial ( )

◆ PICC_DumpToSerial() [1/2]

void mfrc522::MFRC522::PICC_DumpToSerial ( Uid uid)

Dumps debug info about the selected PICC to Serial. On success the PICC is halted after dumping the data. For MIFARE Classic the factory default key of 0xFFFFFFFFFFFF is tried.

Parameters
uidPointer to Uid struct returned from a successful PICC_Select().
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◆ PICC_DumpToSerial() [2/2]

void mfrc522::MFRC522::PICC_DumpToSerial ( Uid uid)

◆ PICC_GetType() [1/2]

uint8_t mfrc522::MFRC522::PICC_GetType ( uint8_t  sak)

Translates the SAK (Select Acknowledge) to a PICC type.

Returns
PICC_Type
Parameters
sakThe SAK byte returned from PICC_Select().
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◆ PICC_GetType() [2/2]

uint8_t mfrc522::MFRC522::PICC_GetType ( uint8_t  sak)

◆ PICC_GetTypeName() [1/2]

const string mfrc522::MFRC522::PICC_GetTypeName ( uint8_t  piccType)

Returns a String pointer to the PICC type name.

Parameters
piccTypeOne of the PICC_Type enums.
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◆ PICC_GetTypeName() [2/2]

const string mfrc522::MFRC522::PICC_GetTypeName ( uint8_t  type)

◆ PICC_HaltA() [1/2]

uint8_t mfrc522::MFRC522::PICC_HaltA ( )

Instructs a PICC in state ACTIVE(*) to go to state HALT.

Returns
STATUS_OK on success, STATUS_??? otherwise.
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◆ PICC_HaltA() [2/2]

uint8_t mfrc522::MFRC522::PICC_HaltA ( )

◆ PICC_IsNewCardPresent() [1/2]

bool mfrc522::MFRC522::PICC_IsNewCardPresent ( )

Returns true if a PICC responds to PICC_CMD_REQA. Only "new" cards in state IDLE are invited. Sleeping cards in state HALT are ignored.

Returns
bool
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◆ PICC_IsNewCardPresent() [2/2]

bool mfrc522::MFRC522::PICC_IsNewCardPresent ( )

◆ PICC_ReadCardSerial() [1/2]

bool mfrc522::MFRC522::PICC_ReadCardSerial ( )

Simple wrapper around PICC_Select. Returns true if a UID could be read. Remember to call PICC_IsNewCardPresent(), PICC_RequestA() or PICC_WakeupA() first. The read UID is available in the class variable uid.

Returns
bool
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◆ PICC_ReadCardSerial() [2/2]

bool mfrc522::MFRC522::PICC_ReadCardSerial ( )

◆ PICC_REQA_or_WUPA() [1/2]

uint8_t mfrc522::MFRC522::PICC_REQA_or_WUPA ( uint8_t  command,
uint8_t *  bufferATQA,
uint8_t *  bufferSize 
)

Transmits REQA or WUPA commands. Beware: When two PICCs are in the field at the same time I often get STATUS_TIMEOUT - probably due do bad antenna design.

Returns
STATUS_OK on success, STATUS_??? otherwise.
Parameters
commandThe command to send - PICC_CMD_REQA or PICC_CMD_WUPA
bufferATQAThe buffer to store the ATQA (Answer to request) in
bufferSizeBuffer size, at least two bytes. Also number of bytes returned if STATUS_OK.
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◆ PICC_REQA_or_WUPA() [2/2]

uint8_t mfrc522::MFRC522::PICC_REQA_or_WUPA ( uint8_t  command,
uint8_t *  bufferATQA,
uint8_t *  bufferSize 
)

◆ PICC_RequestA() [1/2]

uint8_t mfrc522::MFRC522::PICC_RequestA ( uint8_t *  bufferATQA,
uint8_t *  bufferSize 
)

Transmits a REQuest command, Type A. Invites PICCs in state IDLE to go to READY and prepare for anticollision or selection. 7 bit frame. Beware: When two PICCs are in the field at the same time I often get STATUS_TIMEOUT - probably due do bad antenna design.

Returns
STATUS_OK on success, STATUS_??? otherwise.
Parameters
bufferATQAThe buffer to store the ATQA (Answer to request) in
bufferSizeBuffer size, at least two bytes. Also number of bytes returned if STATUS_OK.
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◆ PICC_RequestA() [2/2]

uint8_t mfrc522::MFRC522::PICC_RequestA ( uint8_t *  bufferATQA,
uint8_t *  bufferSize 
)

◆ PICC_Select() [1/2]

uint8_t mfrc522::MFRC522::PICC_Select ( Uid uid,
uint8_t  validBits = 0 
)

Transmits SELECT/ANTICOLLISION commands to select a single PICC. Before calling this function the PICCs must be placed in the READY(*) state by calling PICC_RequestA() or PICC_WakeupA(). On success:

  • The chosen PICC is in state ACTIVE(*) and all other PICCs have returned to state IDLE/HALT. (Figure 7 of the ISO/IEC 14443-3 draft.)
  • The UID size and value of the chosen PICC is returned in *uid along with the SAK.

A PICC UID consists of 4, 7 or 10 bytes. Only 4 bytes can be specified in a SELECT command, so for the longer UIDs two or three iterations are used: UID size Number of UID bytes Cascade levels Example of PICC ======== =================== ============== =============== single 4 1 MIFARE Classic double 7 2 MIFARE Ultralight triple 10 3 Not currently in use?

Returns
STATUS_OK on success, STATUS_??? otherwise.
Parameters
uidPointer to Uid struct. Normally output, but can also be used to supply a known UID.
validBitsThe number of known UID bits supplied in *uid. Normally 0. If set you must also supply uid->size.
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◆ PICC_Select() [2/2]

uint8_t mfrc522::MFRC522::PICC_Select ( Uid uid,
uint8_t  validBits = 0 
)

◆ PICC_WakeupA() [1/2]

uint8_t mfrc522::MFRC522::PICC_WakeupA ( uint8_t *  bufferATQA,
uint8_t *  bufferSize 
)

Transmits a Wake-UP command, Type A. Invites PICCs in state IDLE and HALT to go to READY(*) and prepare for anticollision or selection. 7 bit frame. Beware: When two PICCs are in the field at the same time I often get STATUS_TIMEOUT - probably due do bad antenna design.

Returns
STATUS_OK on success, STATUS_??? otherwise.
Parameters
bufferATQAThe buffer to store the ATQA (Answer to request) in
bufferSizeBuffer size, at least two bytes. Also number of bytes returned if STATUS_OK.
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◆ PICC_WakeupA() [2/2]

uint8_t mfrc522::MFRC522::PICC_WakeupA ( uint8_t *  bufferATQA,
uint8_t *  bufferSize 
)

◆ setBitMask() [1/2]

void mfrc522::MFRC522::setBitMask ( unsigned char  reg,
unsigned char  mask 
)

◆ setBitMask() [2/2]

void mfrc522::MFRC522::setBitMask ( unsigned char  reg,
unsigned char  mask 
)

Member Data Documentation

◆ FIFO_SIZE

static const uint8_t mfrc522::MFRC522::FIFO_SIZE = 64
static

◆ mResetPin

IGpio & mfrc522::MFRC522::mResetPin

◆ mSpi

ISpi & mfrc522::MFRC522::mSpi

◆ uid

Uid mfrc522::MFRC522::uid

The documentation for this class was generated from the following files: